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Functional block for integrated circuit, semiconductor integrated circuit, method for testing semiconductor integrated circuit, and method for designing semiconductor integrated circuit

a technology for integrated circuits and functional blocks, which is applied in the direction of detecting faulty computer hardware, faulty hardware testing methods, instruments, etc., can solve the problems of difficult to produce test data patterns that should be propagated through the respective functional blocks, and difficult for users to produce test data patterns. to achieve the effect of easy testing, easy and accurate production of test data

Inactive Publication Date: 2004-07-15
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0012] According to the first IC functional block, a test data output circuit for outputting test data is provided within the IC functional block. Thus, if a semiconductor integrated circuit is constructed of the block and another IC functional block including a circuit that can receive the test data and compare it to an expected value, then the test data can be transmitted and received even when the user does not know much about the internal configuration and operation of the IC functional blocks. Accordingly, even if IC functional blocks are combined or the circuit sizes of the IC functional blocks are huge, a test among the IC functional blocks can be carried out easily and accurately in the semiconductor integrated circuit.
[0097] As can be understood, even if the user does not know much about the configurations (i.e., the circuit or functional configurations) of the respective functional blocks 10, 20 and 30 or if the circuit sizes are too huge to produce test data with ease, the inter-block signal line 2 can be tested easily and accurately according to this embodiment.

Problems solved by technology

If a semiconductor integrated circuit is designed by combining a plurality of functional blocks with each other, however, there arises a problem in how to test a signal line interconnecting these functional blocks together.
However, if the first and second functional blocks 501 and 502 are combined and reused, it might be difficult for the user to produce test data patterns that should be propagated through the respective functional blocks.
This is because the user is not acquainted with the internal configurations and operations of the functional blocks.
Also, if the circuit sizes of the first and second functional blocks 501 and 502 are huge, then it is extremely complicated and very difficult to produce test data patterns that should be propagated through the respective functional blocks.
Thus, a large number of clock cycles should be consumed for that purpose, and it is difficult to supply the test data patterns rapidly and continuously enough to detect a fault promptly.

Method used

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  • Functional block for integrated circuit, semiconductor integrated circuit, method for testing semiconductor integrated circuit, and method for designing semiconductor integrated circuit
  • Functional block for integrated circuit, semiconductor integrated circuit, method for testing semiconductor integrated circuit, and method for designing semiconductor integrated circuit
  • Functional block for integrated circuit, semiconductor integrated circuit, method for testing semiconductor integrated circuit, and method for designing semiconductor integrated circuit

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first embodiment

[0102] Hereinafter, a first modified example of the present invention will be described with reference to the drawings.

[0103] FIG. 6 illustrates circuit configurations of functional blocks and a semiconductor integrated circuit, which is made up of these functional blocks, according to a first modified example of the first embodiment. In FIG. 6, the same components as those illustrated in FIG. 1 are identified by the same reference numerals and the description thereof will be omitted herein. The semiconductor integrated circuit 1 shown in FIG. 6 includes first, second and third functional blocks 10, 20A and 30. This embodiment is characterized in that only one of the functional blocks 10, 20A and 30 included in the semiconductor integrated circuit 1 includes the test data output circuit. In the illustrated example, only the first functional block 10 includes the test data output circuit 12 as shown in FIG. 6.

[0104] In this configuration, the total circuit size of the functional bloc...

second embodiment

[0113] (Second Embodiment)

[0114] Hereinafter, a second embodiment of the present invention will be described with reference to the drawings.

[0115] FIG. 9 schematically illustrates a library used in designing a semiconductor integrated circuit according to a second embodiment of the present invention. In FIG. 9, a library of functional blocks, in which the functional blocks according to the present invention are registered, is identified by 8, the first functional block as described in the first embodiment by 10, the third functional block by 30 and a unidirectional functional block for outputting the result of a predetermined function by 40. Although not shown, the functional blocks as described in the first, second and third modified examples of the first embodiment, e.g., the testing-dedicated functional blocks in particular, may also be registered therein.

[0116] A method for designing a semiconductor integrated circuit using this functional block library 8 will be outlined.

[0117]...

third embodiment

[0121] (Third Embodiment)

[0122] Hereinafter, a third embodiment of the present invention will be described with reference to the drawings.

[0123] In this embodiment, circuit configuration of the test data output circuit and method for generating a test data pattern, which is output by the test data output circuit, will be described.

[0124] FIG. 10 illustrates a circuit configuration of a test data output circuit for a functional block according to a third embodiment of the present invention. As shown in FIG. 10, the test data output circuit 12 includes: an original data generating section 121 implemented as a flip-flop circuit with input terminal, non-inverting output terminal and inverting output terminal, in which the inverting output terminal is connected to the input terminal; and first, second, third and fourth selector circuits 122A, 122B, 122C and 122D implemented as multiplexers, each receiving non-inverted signal and inverted signal as first and second original data from the ...

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Abstract

A semiconductor integrated circuit (1) includes first, second and second functional blocks (10, 20 and 30). The first, second and second functional blocks (10, 20 and 30) are coupled together via an inter-block signal line (2). The first functional block (10) includes: a logic circuit (11); a test data output circuit (12), which operates during testing and outputs a predetermined test data pattern; a testing standby circuit (14), which is connected between a selector (13) and an external bidirectional pin and makes the functional block enter a standby state during testing; a tristate buffer (15) that is made to have a high impedance by the testing standby circuit (14); and a decision result output circuit (16), which receives the test data pattern from the second functional block, compares the received test data pattern to an expected value stored therein, and outputs a decision result to a decision result signal line (5).

Description

[0001] The present invention relates to a functional block for integrated circuit (hereinafter, simply referred to as an "IC functional block") implemented as a macro cell including a self-diagnosis circuit for detecting a fault between functional blocks, for example. The present invention also relates to a semiconductor integrated circuit that has been designed using the IC functional block and to respective methods for testing and designing the semiconductor integrated circuit.[0002] In recent years, demand for designing a semiconductor integrated circuit more efficiently by implementing the circuit as a combination of functional blocks such as macro cells has been increasing. If a semiconductor integrated circuit is designed by combining a plurality of functional blocks with each other, however, there arises a problem in how to test a signal line interconnecting these functional blocks together. To solve this problem, according to a conventional technique, the operations of a pai...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F11/22H01L27/02
CPCH01L27/0207G06F11/2273H01L27/04
Inventor OHTA, MITSUYASUTAKEOKA, SADAMIHIRAOKA, TOSHIHIRO
Owner PANASONIC CORP
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