Processor for Implementing Non-Arithmetic Functions

Abstract

A processor comprises an array of computing elements, with each computing element comprising an arithmetic logic circuit (ALC) and at least one three-dimensional memory (3D-M) array. The 3D-M array stores at least a portion of a look-up table (LUT) for a non-arithmetic function, while the ALC performs arithmetic operations on the LUT data. Because they include more operations than the basic arithmetic operations (i.e. addition, subtraction and multiplication), the non-arithmetic functions cannot be implemented by the conventional logic circuits alone.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is a continuation of U.S. patent application Ser. No. 15 / 487,366, filed Apr. 13, 2017, which claims priority from Chinese Patent Application 201610083747.7, filed on Feb. 13, 2016; Chinese Patent Application 201610260845.3, filed on Apr. 22, 2016; Chinese Patent Application 201610289592.2, filed on May 2, 2016; Chinese Patent Application 201710237780.5, filed on Apr. 12, 2017, in the State Intellectual Property Office of the People's Republic of China (CN), the disclosure of which are incorporated herein by references in their entireties.BACKGROUND1. Technical Field of the Invention[0002]The present invention relates to the field of integrated circuit, and more particularly to processors.2. Prior Art[0003]Conventional processors use logic-based computation (LBC), which carries out computation primarily with logic circuits (e.g. XOR circuit). Conventional logic circuits are suitable for arithmetic functions, whose operatio...

AI Technical Summary

Problems solved by technology

However, the conventional logic circuits are not suitable for non-arithmetic functions, whose operations include more than the basic arithmetic operations.

Because they cannot be represented by a combination of the basic arithmetic operations, the non-arithmetic functions cannot be implemented by the conventional logic circuits alone.

Non-arithmetic functions are computationally hard and their hardware implementation has been a major challenge.

The 2-D integration severely limits computational density and computational complexity.

This has an adverse effect on parallel computation.

Apparently, the software-implemented functions (e.g. mathematical functions, mathematical models) run much slower and less efficient than the hardware-implemented functions (i.e. built-in functions), and extra software-decomposition steps (e.g. for mathematical models) would make these performance gaps even more pronounced.

Typical mathematical models are nonlinear and cannot be represented by a combination of these arithmetic operations.

This large amount of computation makes simulation extremely slow and inefficient.

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