Supply voltage tolerant phase-locked loop circuit

Inactive Publication Date: 2000-09-19
TAIWAN SEMICON MFG CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But with the advent of portable PCs and energy efficient "green" PCs, many integrated circuits now have to be able to operate at both 3.3 V and 5 V. It is usually not a problem for digital circuits as long as the circuits can operate at the required

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  • Supply voltage tolerant phase-locked loop circuit
  • Supply voltage tolerant phase-locked loop circuit
  • Supply voltage tolerant phase-locked loop circuit

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Example

FIG. 3 shows how to adjust the frequency range of a PLL based on supply voltage. First, the power supply voltage level is detected by detector 12. The detector output 13 is coupled to the PLL 14. Supply voltage detector 12 operates by comparing the supply voltage VDD with a reference voltage VREF which is independent of the supply voltage. The reference voltage VREF can come from an external voltage regulator or be generated on-chip by a bandgap reference voltage source. Since the reference voltage VREF will generally be lower than the supply voltage VDD, the reference voltage cannot be compared directly with the supply voltage. Rather, the supply voltage is scaled and compared with the reference voltage. There are many possible ways to scale down the supply voltage. One way is to use a voltage divider as shown in FIG. 4. If all that is needed is to operate the PLL at 3.3 V and 5 V, a divide-by-two voltage divider R1 / R2 is used to scale the supply voltage VDD from 3.3 V to 1.65 V an...

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Abstract

A phase-locked loop design is provide that can operate at a plurality of dissimilar supply voltages. By adjusting the frequency range of a PLL based on the power supply voltage, the same PLL design can operate at different supply voltages.

Description

TECHNICAL FIELDThe present invention relates to integrated circuit devices, and more particularly to a phase-locked loop integrated circuit.BACKGROUND OF THE INVENTIONUntil recently, most of the integrated circuits were designed to operate with a single 5 V power supply voltage. But with the advent of portable PCs and energy efficient "green" PCs, many integrated circuits now have to be able to operate at both 3.3 V and 5 V. It is usually not a problem for digital circuits as long as the circuits can operate at the required clock frequency at 3.3 V. But for analog circuits, operating at a different supply voltage can be a complicated issue, especially for the analog phase-locked loops (PLL). For example, the frequency range of a PLL usually has a strong dependency on the power supply voltage. FIG. 1 shows a typical PLL circuit known in the art. As shown in FIG. 2A-2B, a PLL designed for 3.3 V operation can be too fast for 5 V operation, especially if variations in temperature and pr...

Claims

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Application Information

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IPC IPC(8): H03L7/08H03L1/00H03L7/18H03L7/16
CPCH03L1/00H03L7/08H03L7/18
Inventor CHEN, DAO-LONG
Owner TAIWAN SEMICON MFG CO LTD
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