Method for forming storage node of capacitor in semiconductor device

Abstract

A method for forming a capacitor in a semiconductor device comprises forming an inter-layer layer on a semi-finished substrate; etching the inter-layer insulation layer to form a plurality of first contact holes; forming a first insulation layer on sidewalls of the first contact holes; forming a plurality of storage-node contact plugs filled into the first contact holes; forming a second insulation layer with a different etch rate from the first insulation layer over the storage-node contact plugs; forming a third insulation layer on the second insulation layer; sequentially etching the third insulation layer and the second insulation layer to form a plurality of second contact holes exposing the storage-node contact plugs; and forming the storage node on each of the second contact holes.

Description

technical field [0001] The present invention relates to a method for forming a storage node of a capacitor in a semiconductor device; and more particularly, to a method for forming a storage node of a capacitor in a dynamic random access memory device. Background technique [0002] With the high integration of semiconductor devices, the size of unit cells has gradually decreased. Especially in dynamic random access memory (DRAM) devices, a unit cell includes a transistor and a capacitor. Therefore, as the scale of integration of semiconductor devices has increased, it has become much more difficult to control related processes. [0003] A method for forming a storage node of a capacitor in a DRAM device and possible problems associated with this storage formation method will be described below with reference to FIGS. 1A to 1C. [0004] Referring to FIG. 1A, an interlayer insulating layer 11 is formed on a substrate 10 provided with various device elements, and then pattern...

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Problems solved by technology

Therefore, the leakage current of the capacitor increases, causing defects in the semiconductor device

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