Overerase protection of memory cells for nonvolatile memory

Abstract

The present invention provides a non-volatile memory with optimal memory erasing function and a corresponding method, particularly a method of erasing a non-volatile memory. The non-volatile memory includes a source and a gate. , a drain, a channel and a capture layer. A method according to a preferred embodiment of the present invention includes the following steps: applying a non-zero gate voltage to the gate, applying a non-zero source voltage to the source, and applying a non-zero drain voltage during each erase trigger. The drain voltage is at the drain electrode and the amplitude of the drain voltage is higher than the source voltage, hot holes are generated in the non-volatile memory, and the generated hot holes are injected into the trapping layer near the drain junction. , and the non-volatile memory is erased accordingly. An erasing method according to another embodiment of the present invention includes performing a verification step after each erase firing to verify the memory erasure of the non-volatile memory. If the memory erasure is not verified, repeat the method according to this method. Inventive process steps.

Description

technical field [0001] The invention relates to a semiconductor memory device, in particular to a method and system for over-erasing protection of a storage unit of a non-volatile memory. Background technique [0002] Memory devices for non-volatile information storage are commonly used in the art. Exemplary nonvolatile semiconductor memory devices include read only memory (ROM), flash memory, programmable read only memory (PROM), erasable and programmable read only memory (EPROM), electrically erasable and programmable Read Only Memory (EEPROM) and Flash EEPROM. [0003] Flash EEPROM is similar to EEPROM in that the memory cells can be programmed (ie, written to) and electronically erased. Also, flash EEPROM has the additional feature of erasing all memory cells within it at once. The widespread use of EEPROM semiconductor memory has prompted the development of EEPROM memory cells with optimal performance characteristics, such as shorter programming time, use of lower vo...

AI Technical Summary

Problems solved by technology

Several over-erased memory cells along a given data line can adversely allow leakage currents to accumulate leading to false reads of data

[0010] In addition to causing data errors to be read, it is difficult to successfully reprogram over-erased memory cells using hot electron programming, especially when there are embedded algorithms in integrated circuits

This difficulty arises from the fact that the amount of electrons required to convert an erased memory cell to the programmed state is often higher than that of an uninterrupted memory cell.

In addition, since the memory erase and program operations have different impacts on multiple memory cells in the memory array, it is difficult to confirm the success of the memory erase and write operations of the memory array as a whole.

Regardless, the patching and patch validation process is often resource-intensive and time-consuming

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