11 results about "Hot holes" patented technology

This utility model relates to the field of planting film hot hole technology, specifically to a portable planting film hot hole device, comprising: a box body, a cover installed on the top of the box body, a sliding groove opened at one end of the cover, and handrails installed on both sides of one end of the box body, and a first spline sleeve installed on the box body, a through circular hole with the same diameter as the first spline sleeve opened on the box body at the corresponding position, a circular hole opened in the middle of the bottom plate of the box body, a hot hole column slidably inserted into the circular hole, a stop ring installed at the top of the hot hole column, and a vertical spring sleeved on the hot hole column, the top of the vertical spring installed at the bottom of the stop ring, and an intermittent drive component installed in the box body, the intermittent drive component being used to drive the up and down movement of the hot hole column. The purpose of this utility model is to provide a portable planting film hot hole device to solve the problems of non-adjustable hot hole spacing and flexibility of planting film hot hole devices.

This application provides a memory and electronic device incorporating a tunneling field-effect transistor (TFET), relating to the field of semiconductor technology. This memory can improve operating efficiency and reduce operating voltage and power consumption. The memory includes a substrate with a first doped region and a second doped region having the same doping type. A memory cell is located on the substrate. Each memory cell includes not only a storage portion but also a gate transistor and a TFET located on either side of the storage portion. The storage portion and the TFET share a common control gate. Thus, the memory is erased using a hot hole injection (HHI) erasure method. Furthermore, under the control of the TFET, the erase voltage can be reduced, thus lowering the memory's power consumption.

The invention discloses a fast erasing method for a nonvolatile memory based on channel hot electron induced hot hole injection and application of the fast erasing method. In a nonvolatile flash memory with split gates, positive source voltage, positive drain voltage and negative storage gate voltage are applied when a selection gate (MG) and a storage node (MS) are started; high-energy channel hot electrons are generated in the channel; high-density hot holes are generated in a channel region through the collision ionization effect of channel hot electrons; hot holes are injected into the charge trapping layer through the tunneling oxide layer, so that the neutralization of stored electrons is completed, and the erasing operation is realized. According to the invention, the collision ionization effect of hot electrons is utilized to generate high-density hot holes, and the hot holes are injected into the charge trapping layer for rapid erasing, so that the erasing efficiency is remarkably improved, the electric field stress is reduced, and the durability and retention performance of equipment are improved.

Provided in the present disclosure is an erasure method for a flash memory cell. The flash memory cell comprises storage transistors and a gating transistor that are connected in series. The erasure method in the present disclosure comprises: applying erasure voltages to electrodes of a flash memory cell and gate electrodes of transistors, wherein the erasure voltage applied to a gate electrode of a storage transistor to be subjected to erasure is lower than a second power source voltage, such that the physical effect of channel hot-electron induced hot hole injection occurs, and thus hot holes in a channel are attracted into a storage medium layer for erasing. Compared with existing band-to-band hot-hole (BBHH) erasure methods, the erasure method for a flash memory cell in the present disclosure provides wider hole distribution and higher injection efficiency, such that the erasure method in the present disclosure achieves a higher erasure speed, a larger erasure window, reduced hot-carrier damage, a lower leakage current and improved endurance reliability.

The present disclosure provides an erase method for a flash memory cell. The flash memory cell includes a storage transistor and a select transistor connected in series. The erase method according to the present disclosure includes applying erase voltages to each electrode of the flash memory cell and a gate electrode of each transistor, wherein the erase voltage applied to the gate electrode of the storage transistor to be erased is lower than a second power supply voltage, so that a channel hot electron induced hot hole injection physical effect occurs to attract hot holes in the channel into a storage medium layer to achieve erasing. The erase method for the flash memory cell according to the present disclosure has a wider hole distribution and a higher injection efficiency than the existing band-to-band hot hole (BBHH) erase method, so that the erase method according to the present disclosure has a higher erase speed, a larger erase window, less hot carrier damage, a lower leakage current, and a higher endurance reliability.

The invention discloses an application of a photoelectric detector in a logic circuit, the photoelectric detector adopts an interlayer structure formed by an upper electrode layer, a lower electrode layer and a semiconductor layer, the upper electrode layer and the lower electrode layer respectively form Schottky contact or ohmic contact with the semiconductor layer, and the ohmic contact is not formed at the same time. Reversible conversion of photocurrent from thermal electron dominated positive response to thermal hole dominated negative response can be realized by regulating and controlling external bias voltage and incident light wavelength and power, the tunable bipolar photoresponse characteristic is obtained, six basic logic functions of ''OR'', ''XOR'', ''AND'', ''NAND'', ''NOR'' and ''NOT'' are realized based on the mechanism, and an integrated photoelectric logic gate circuit is constructed. Compared with a traditional electronic transistor logic circuit, the electronic transistor logic circuit has the advantages of being simple in structure, low in power consumption, high in integration level and good in process compatibility, and a new implementation way is provided for development of low-cost semiconductor photoelectric logic chips and on-chip optical calculation.

The application discloses a non-volatile memory fast erasing method based on channel hot electron induced hot hole injection and application thereof. In the non-volatile flash memory with split gate, a positive source voltage, a positive drain voltage and a negative storage gate voltage are applied under the opening of a selection gate MG and a storage node MS, so as to generate high-energy channel hot electrons in the channel. High-density hot holes are generated in the channel region through the collision ionization effect of the channel hot electrons. The hot holes are used to inject the charge trapping layer through the tunneling oxide layer, the neutralization of the storage electrons is completed, and the erasing operation is realized. The application generates high-density hot holes through the collision ionization effect of the hot electrons, and the hot holes are used to inject the charge trapping layer for fast erasing, so that the erasing efficiency is improved, the electric field stress is reduced, and the durability and retention performance of the equipment are improved.

The substrate processing device of the present invention includes: a disc portion, which is arranged inside a chamber equipped with a heating component; and a carrier plate portion, which is installed on one side of the disc portion and is used to place a substrate; a heat hole is formed on the mounting surface of the disc portion on which the carrier plate portion is installed, through which heat generated by the heating component can pass, or a gear hole is formed on the carrier plate gear facing the disc portion, through which heat from the heating component can pass.

The invention discloses a heating roller belonging to the technical field of rollers, which comprises a heating roller, and is characterized in that the heating roller is provided with at least one group of heating holes and at least one group of heat conduction holes along the axial direction, heating pipes are arranged in the heating holes in a penetrating manner, heat conduction media are arranged in the heat conduction holes, the heat conduction media are sealed in the heat conduction holes, and the heat conduction holes are communicated with the heating pipes. The heating pipes operate to heat the heating holes in the circumferential direction and conduct heat to one sides of the heat conduction holes, the heat conduction media exchange heat with the high-temperature areas and the low-temperature areas in the axial direction and the circumferential direction of the heat conduction holes, and uniform heating in the axial direction and the circumferential direction of the heating rollers is achieved. The heating pipe heats the heating hole in the axial direction and the circumferential direction, the heat-conducting medium absorbs heat of the high-temperature area in the circumferential direction of the heat-conducting hole and exchanges heat with the low-temperature area in the circumferential direction and the axial direction of the heat-conducting hole, uniform heat is conducted on the heating roller in the circumferential direction and the axial direction, and the axial temperature and the circumferential temperature of the heating roller are more uniform.

The invention discloses a high-thermal-conductivity PCB three-dimensional heat dissipation channel preparation method, device and equipment. The method comprises the following steps: selecting a high-thermal-conductivity FR-4 base material containing nano aluminum oxide particles, and carrying out cutting and plasma cleaning on the high-thermal-conductivity FR-4 base material; delimiting a heat dissipation reference layer in the middle layer of the PCB, forming a groove in a projection area, corresponding to a surface heating device, of the heat dissipation reference layer, and processing a groove wall; a main heat conduction hole array penetrating through the surface layer to the heat dissipation reference layer and auxiliary heat conduction holes connecting the heat dissipation reference layer and the bottom layer are machined through a laser drilling machine; a gradient metal coating is formed through chemical copper deposition, copper electroplating and local silver electroplating in sequence; an oxygen-free copper insert is embedded into the groove of the heat dissipation reference layer and is fixed through a heat conduction silver adhesive; a wiring layer is manufactured and pressed, wherein after line etching and solder mask layer processing are completed, all the layers are combined in a hot pressing mode; and post-treatment and detection: carrying out surface gold immersion and heat dissipation performance detection. By means of the mode, the purposes of constructing an efficient penetrating type heat dissipation network and preparing the PCB with the heat dissipation performance and wiring compatibility considered can be achieved.