Flash memory cell, flash memory array and method of operation thereof

Abstract

The invention provides a flash memory unit, a flash memory array and an operation method thereof, comprising: an N well is formed in a P-type substrate, a P-type doped region is formed in the N well, and the P-type doped region is used as the first A source, a second source, and a drain; the gate structure on the N well is located between the first source and the second source, and the gate structure has a symmetrical shape about the erasing gate Two storage bits, each containing a floating gate and a word line gate. The flash memory unit provided by the present invention is programmed by generating high-energy electrons or even hot electrons through the collision ionization of hot holes at the drain pinch-off point, which is beneficial to the miniaturization of the device and achieves the purpose of reducing the area of ​​the device unit, and the flash memory unit provided by the present invention With a special erasing gate, it can be erased without applying high voltage to the word line gate, so that the second oxide layer under the word line gate can be made very thin, so the read voltage can be very small, which simplifies the design of the read circuit .

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a flash memory unit, a flash memory array and an operation method thereof. Background technique [0002] As an integrated circuit storage device, flash memory (flash memory) is widely used in portable computers, mobile phones, digital music players, etc. devices and other electronic products. [0003] Generally speaking, when manufacturing flash memory, we must try our best to consider how to reduce the size of each memory cell. However, the existing SST flash memory structure uses source-side hot electron programming, which requires a large overlapping area between the floating gate and the drain to provide a large enough memory cell. Only in this way, the voltage applied to the source polysilicon during programming can provide a large enough coupling voltage to the floating gate, but the disadvantage of this is: the large overlapping area between the floating gate an...

AI Technical Summary

Problems solved by technology

[0004] The object of the present invention is to provide a flash memory unit, a flash memory array and an operation method thereof, so as to solve the problems that the flash memory unit cannot be further reduced in the prior art.

Images