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Multi-mode microprocessor with 32 bits

A microprocessor and processor technology, applied in the direction of machine execution devices, concurrent instruction execution, etc., can solve the problems of not showing advantages, not being able to select the operating mode, and not being able to fully utilize the processor performance, etc., to achieve the effect of effective hardware resources

Inactive Publication Date: 2010-02-24
ZHEJIANG UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Most of the existing microprocessor structures only support one operating mode, and the corresponding operating mode cannot be selected according to different application characteristics
Due to the diversity of embedded applications, the processor has high performance in some applications, but it does not show advantages in other applications, and the performance of the processor cannot be fully utilized.
There are no relevant patents and research on the research on the microprocessor structure supporting multi-mode according to different application characteristics

Method used

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  • Multi-mode microprocessor with 32 bits
  • Multi-mode microprocessor with 32 bits
  • Multi-mode microprocessor with 32 bits

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Embodiment Construction

[0032] The operation process of the microprocessor of the present invention in various modes is as figure 1 Gesture. The dual launch mode is the default mode of the processor, and the processor enters the dual launch mode after startup.

[0033] In the dual launch mode, the processor adopts the dual launch strategy of sequential launch. Such as figure 1 As shown in (2), the processor fetches two adjacent 32-bit instructions from the instruction cache in each clock cycle and transmits them to the pipeline. The first instruction enters the pipeline PIPE 1, and the latter instruction enters the pipeline PIPE 2. It is ensured that the instructions issued to PIPE 1 precede the instructions issued to PIPE 2 in the order of program execution. The execution order of instructions in the pipeline is consistent with the actual order of instructions in the program. When an instruction cannot be issued due to a certain pipeline event, the entire instruction transmission is blocked until the ...

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PUM

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Abstract

The invention discloses a 32-bit multi-modal microprocessor, and the processor is based on two level-six pipeline structures PIPE1 and PIPE2, which both comprise the six pipeline levels of command fetching, decoding, executing, accessing and storing, TAG comparing and back writing; the processor supports three running modes, including dual-core mode, dual-transmission mode or dual-thread mode; under the dual-core mode, the processor is divided in microstructure into two single-transmission processors with high performance; under the dual-transmission mode, the processor is merged in microstructure into a computer processor with high performance, dual transmission and compact command set; under the dual-thread mode, the processor is a simulated SMT processor between fine granularity and multi-thread technology, thus the processor can support two running modes at the time. The microprocessor of the invention can be configured into different running modes according to application features.

Description

Technical field [0001] The present invention relates to a microprocessor and a computer system. More specifically, the present invention relates to a 32-bit multi-mode microprocessor that satisfies the characteristics of a variety of embedded media applications. The microprocessor supports 3 operating modes: dual emission superscalar Mode (referred to as dual launch mode), dual processor core mode (referred to as dual core mode), dual thread mode, users can choose the corresponding operating mode according to the characteristics of the application. Background technique [0002] At present, embedded media has a wide range of applications, and different applications have different characteristics and require different processor performance. For example, some applications require the processor to respond to user requests in real time, monitor various states of system operation, and then perform correct system control, and require the processor to perform a large number of real-time ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/38
Inventor 刘鹏陈科明顾雄礼黄卫兵王小航王维东史册姚庆栋
Owner ZHEJIANG UNIV
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