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Method and device for generating optimized program, program execution device, and recording medium

A technology for generating devices and programs, applied in the field of generating optimized programs, which can solve problems such as ineffective use of execution frequency

Inactive Publication Date: 2008-08-20
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In this case, when a processor element is assigned to a path with a high execution frequency based on the determined execution frequency information set for the entire execution cycle of the program, within the execution cycle, the path with a path different from the determined execution frequency cannot be effectively used. The execution frequency of the processor element

Method used

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  • Method and device for generating optimized program, program execution device, and recording medium
  • Method and device for generating optimized program, program execution device, and recording medium
  • Method and device for generating optimized program, program execution device, and recording medium

Examples

Experimental program
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Embodiment 1

[0082]

[0083] The program of Embodiment 1 is a program executed by a processor having a plurality of processor elements, that is, a program executed by a computer (hereinafter referred to as "target hardware"). The procedure of Example 1 has been improved from the conventional procedure.

[0084] The program of Embodiment 1 includes: a code sequence including a code sequence generated by converting a source program including a portion repeatedly executed into an execution format (hereinafter referred to as "compensation path code"); A code sequence of code sequences for multiple paths (in which there are no branch instructions) (hereinafter referred to as "path-specific code").

[0085] Each of the compensation path code and the specific path code includes a history update processing code that increments execution history information indicating the number of execution times of the path and total execution number information indicating the number of times of execution as T...

Embodiment 2

[0274]

[0275] In the process of checking the specific path codes to be executed in parallel with each other in Embodiment 1, the execution program 130 cancels the assignment of the processor element to the specific path code corresponding to its execution number and the total execution number in the specific path code that has been executed in parallel with the compensation path code. The assignment of specific path codes for paths whose ratio is less than the path selection threshold (hereinafter such paths are referred to as restricted paths) assigns processor elements to those that have not yet been executed in parallel and whose ratio of the number of executions to the total number of executions is greater than the path selection threshold The specific path code of the value, depends on the number of processor elements available on the target hardware, and causes this specific path code to execute in parallel with the compensating path code. This structure enables effic...

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PUM

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Abstract

A parallel execution judgment part included in a program for execution, which execute control of selecting specific path codes that have a ratio of the number of executions of each path indicated by the execution history information 301 stored in the memory 300 to the total number of executions indicated by total execution number information 302 stored in the memory 300 higher than a path selection threshold value, so as to assign processor elements to the compensation path code 132 and some or all selected specific path codes on basis of number of assignable processor elements in target hardware. And once actual number of execution of each path reaches a predetermined value, inspection of specific path code in parallel with compensation path code is executed.

Description

technical field [0001] The present invention relates to a technique for generating a program executed by a processor (computer) having a plurality of processor elements, and particularly relates to generating an optimized program. technical background [0002] In a technique for generating an execution program executed by a computer that can execute two or more instructions in parallel with each other, especially for arranging instructions in parallel in a predetermined segment following a conditional branch instruction, it is known, for example, in Japanese Patent Application 2004- The technique disclosed in No. 341236. [0003] According to Japanese Patent Application No. 2004-341236, information on each execution path (hereinafter simply referred to as a path) included in a predetermined section following a conditional branch instruction is obtained from a source program including a conditional branch instruction. The execution frequency information of each path is also ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/45G06F9/46
CPCG06F9/3842G06F9/5066G06F9/3851G06F9/3885
Inventor 畑野文博田中旭
Owner PANASONIC CORP