System and method dynamically switching data queue critical value

Abstract

The invention provides a system and a method for dynamically switching threshold values of a data queue. The data queue, such as a data queue of an FIFO (First In First Out) buffer, is provided with a first threshold value and a second threshold value, wherein the first threshold value is larger than the second threshold value. The method can dynamically switch to the first threshold value or the second threshold value of the data queue according to the different power-down modes of a CPU. When the data quantity in the data queue is smaller than the switched first threshold value or second threshold value, a main memory is accessed so as to fill the data queue to the full. The system and the method can save the power energy and ensure longer service time of a portable electronic device under the condition of the limited power supply.

Description

technical field [0001] The present invention relates to a power management, in particular to a system and method for dynamically switching the threshold of a first-in-first-out buffer (FIFO). Background technique [0002] Intel Corporation (Intel) formulated and announced the high definition audio (high definition audio, hereinafter referred to as HDA) specification in 2004. For details of the specification, please refer to the High Definition Audio Specification version 1.0 and its subsequent update version (http: / / www. .intel.com / standards / hdaudio / ). [0003] figure 1 Shows the basic architecture of HDA. A central processing unit (CPU) 10 is connected to a memory controller 12 via a host bus 11 for controlling access to a system memory 13 . The memory controller 12 is connected to an HDA controller (HDAC) 15 via a system bus (eg, PCI) 14 . The HDA controller 15 is connected to one or more codecs (coder / decoder, codec) 17 via an HDA link 16 . HDA controller 15 includes...

AI Technical Summary

Problems solved by technology

The traditional HDA system adopts a fixed FIFO critical value whether it is in the C3 / C4 state or the C0 / C2 state, so that the CPU 10 often leaves C3 / C4 to enter the C0 / C2 state

In view of the fact that the traditional power-saving sleep state transition is not very efficient for power saving, it is urgent to propose a control mechanism to save more power, so that portable electronic devices can be used longer under the condition of limited power supply time

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