HSDPA co-processor for mobile terminals

A technology for processing blocks and filters, applied in transmitter/receiver shaping networks, digital transmission systems, baseband system components, etc., can solve HSDPA increased design, inefficiency, difficulties, etc.

Inactive Publication Date: 2009-04-15
AGERE SYST INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, adding HSDPA to existing R99 designs for mobile terminals has previously been problematic because the increased complexity and increased performance requirements of HSDPA have previously made it very difficult and inefficient to modify existing R99 designs

Method used

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  • HSDPA co-processor for mobile terminals
  • HSDPA co-processor for mobile terminals
  • HSDPA co-processor for mobile terminals

Examples

Experimental program
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Embodiment Construction

[0048] Figure 1 illustrates an exemplary HSDPA coprocessor 11 according to one embodiment of the present invention. The coprocessor 11 has two main functional hardware blocks, an advanced receiver (AR) 12 and a physical and transport channel processor (PTCP) 13 , and further includes a CPU interface 14 .

[0049] Coprocessor 11 performs all layer-1 (L1) digital baseband processing for HS-SCCH control channel and HS-PDSCH data channel and is designed to coexist with legacy R99 modem 21, which implements all HSDPA non-L1 functions described in the HSDPA standard . Legacy modem 21 provides all front-end support, including filtering, automatic frequency control, automatic gain control, multipath hunting, high-level interfaces, synchronization, and related functions. The legacy modem 21 also provides uplink (UL) support for transmitting the HS-DPCCH channel containing the CQI and ACK / NACK values ​​determined by the coprocessor 11 .

[0050] The co-processor 11 has a hardware data...

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Abstract

In one embodiment, an HSDPA co-processor for 3GPP Release 6 Category 8 (7.2 Mb / s) HSDPA that provides all chip-rate, symbol-rate, physical-channel, and transport-channel processing for HSDPA in 90nm CMOS. The co-processor design is scalable to all HSDPA data rates up to 14 Mb / s. The coprocessor implements an Advanced Receiver based on an NLMS equalizer, supports RX diversity and TX diversity, and provides up to 6.4 dB better performance than a typical single- antenna rake receiver. Thus, 3GPP R6 HSDPA functionality can be added to a legacy R99 modem using an HSDPA co-processor consistent with embodiments of the present invention, at a reasonable incremental cost and power.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of the filing date of US Provisional Application No. 60 / 789347, filed April 5, 2006, the teachings of which are incorporated herein by reference. technical field [0003] The present invention relates generally to mobile communication systems, and more particularly to transmitting and receiving information in a mobile communication system supporting a High Speed ​​Downlink Packet Access (HSDPA) scheme. Background technique [0004] Universal Mobile Telecommunications Service (UMTS) is a third generation (3G) broadband, packet-based mobile network that allows text, digitized voice, video, and multimedia to be sent at data rates of up to 2 Mb / s. The goal of UMTS, based on the Global System for Mobile Communications (GSM) communication standard, is to provide a stable set of services to mobile computer and telephone users wherever they are located in the world. [0005] UMTS mobile wir...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L25/02H04L25/03H04B1/707
CPCH04B1/70754H04B2201/70701H04L25/03292H04B1/7097H04L2025/03687H04L25/03057H04L2025/03617H04B1/707H04L25/03
Inventor R·班纳M·A·别克斯塔夫M·E·库克A·P·京李仪晨O·瑞德勒U·松图威斯基C·N·A·托马斯L·尤格K·万德拜德B·J·温得杜普G·K·伍德瓦德D·W-K耶普周宫雨
Owner AGERE SYST INC
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