Analog electricity saving device for electric charge allocation and method thereof
A charge distribution and analog technology, applied in digital-to-analog converters, differential amplifiers, DC-coupled DC amplifiers, etc., can solve problems such as power consumption of application devices and power consumption of application devices
Inactive Publication Date: 2009-05-06
NOVATEK MICROELECTRONICS CORP
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[0014] Therefore, the output voltage V OUT During period T 2 -T 4 , it must be lowered from the high voltage level to the distribution voltage V EQ After the voltage level, followed by the period T 5 and then pulled up to a high voltage level, and this situation will still cause power consumption of the above-mentioned application device
In addition, when the storage / distribution capacitance C EQ must distribute its stored charge to the load capacitance C L on period, and the storage / distribution capacitor C EQ The stored charge is less than the load capacitance C L When the stored charge occurs, it should be the storage / distribution capacitance C EQ To distribute the stored charge to the load capacitance C L In the case of , it will instead become a load capacitance C L Distribute the stored charge to the storage / distribution capacitor C EQ situation, and this situation will cause the power consumption of the above-mentioned application device to be more
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[0078] The technical effect that the present invention intends to achieve is to solve the adverse effect caused by the digital system judgment mechanism of the application device in the power saving device for charge distribution described in the prior art. The following content will be a detailed description of the technical features and desired effects of the present invention, so as to provide references for those skilled in the art related to the present invention.
[0079] Figure 5 A block diagram of an analog charge distribution power saving device 500 according to an embodiment of the present invention is shown. Please refer to Figure 5 The power saving device 500 for analog charge distribution in this embodiment includes a digital-to-analog converter 501, an operational amplifier 503, a first switch SW1 and a second switch SW2, a load capacitor CL, and an energy storage unit (such as a storage / distribution capacitor C EQ ), and the control module 505. Wherein, the...
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The invention relates to an electric saver of electric charge distribution of an analog type and a method thereof. A judging mechanism of an analog type is used, thus, when an energy storing unit has to distribute the stored electric charges to a loading capacitor and the number of the electric charges stored by the energy storing unit is smaller than that of the electric charges stored by the loading capacitor, the path used for the energy storing unit to distribute the electric charges to the loading capacitor is blocked, and after the loading capacitor releases the electric charges to the energy storing unit to be stored, the number of the electric charges stored in the loading capacitor after electric charge release is inhibited to be not lower than the number of the electric charges stored in the energy storing unit after electric charge storage, thus, the electric saver of electric charge distribution of an analog type enables an applying device to obtain the mechanism of complete electric conservation.
Description
technical field [0001] The invention relates to a power saving device for charge distribution and its method, in particular to an analog charge distribution power saving device and its method. Background technique [0002] Generally, an operational amplifier (OPA) is often used in an analog circuit to drive a load capacitor to provide an output voltage for the required application circuit. figure 1 shows a known op amp 101 driving the load capacitance C L The circuit diagram of , wherein the positive input terminal (+) of the operational amplifier 101 is used to receive the analog voltage V generated by the digital to analog converter (digital to analog converter, DAC) 103 according to the digital code DS received by it DAC , and the output terminal of the operational amplifier 101 and its negative input terminal (-) are connected to each other to form a unit gain amplifier (unit gain amplifier) to drive the load capacitance C L , thereby providing the output voltage V ...
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Login to View More IPC IPC(8): H03M1/66H03F3/45
Inventor 谢晋升
Owner NOVATEK MICROELECTRONICS CORP