Backup clock calibrated by GPS

A technology of GPS receiver and clock, which is applied in the field of GPS timing and punctuality, can solve problems such as complex circuits, achieve the effect of improving punctual accuracy and simple design

Inactive Publication Date: 2010-08-11
HUAZHONG UNIV OF SCI & TECH
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  • Abstract
  • Description
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AI Technical Summary

Problems solved by technology

The advantage of this scheme is that it achieves frequency locking while achieving timekeeping; its disadvantage is that the implementation of the scheme is complex and requires high-precision DAC, multiple power supplies and challenging analog circuit design

Method used

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  • Backup clock calibrated by GPS
  • Backup clock calibrated by GPS
  • Backup clock calibrated by GPS

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Embodiment Construction

[0037] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0038] The all-digital clock keeping based on the adder comprises GPS receiver 4, antenna 5, single-chip microcomputer 1, programmable logic device 2, crystal oscillator 6 and time-to-digital converter TDC3; The second pulse signal GPS-1PPS of GPS receiver 4 outputs respectively Send to single-chip microcomputer 1, programmable logic device 2 and TDC3, and the NMEA-0183 positioning and timing message output by GPS receiver 4 is sent to single-chip microcomputer 1; The above satellite), and accordingly control the clock circuit into different working states. The single chip microcomputer 1 is connected with the programmable logic device 2 through the data bus DBUS, the address bus ABUS and the control signal lines CS, WR, SELE and CLEAR, and connected with the TDC3 through the SPI bus.

[0039] The clock circuit based on the adder in the progra...

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Abstract

The invention provides an adder-based backup clock calibrated by a GPS. The adder-based backup clock comprises a GPS receiver, a singlechip, a crystal oscillator, a programmable logic device and a time-digital converter (TDC) which are connected in sequence. The frequency of the crystal oscillator is divided into second pulse output by an adder-based clock circuit realized in the programmable logic device, wherein the frequency dividing ratio of the clock circuit can be finely adjusted. By utilizing the characteristic that 1PPS second pulse signals output by the GPS receiver has a random jitter error but no accumulation error while a second pulse generated after the frequency division of the high-stability crystal oscillator has good temporary stability but the accumulation error, the time-digital converter (TDC) is adopted to measure a phase difference between the two second pulses and filter measurement results of multiple times so as to calculate an accuracy error value of the frequency of the crystal oscillator, the error value is converted into a clock step fine-adjusting value and the frequency dividing ratio of the circuit is adjusted to compensate an accuracy error of the crystal oscillator generated by aging so as to realize high-precision backup. The backup clock has the advantages of full digitalization, simple structure, convenient integration and the like.

Description

technical field [0001] The invention belongs to the field of GPS time service and time keeping, in particular to a GPS calibrated time keeping clock. Background technique [0002] A watchdog is an accurate clock composed of a standard frequency source, a frequency divider and a counter with a certain frequency division ratio. [0003] Punctuality refers to the ability of a calibrated clock to keep the error between its time and standard time as small as possible in the state of autonomous operation. Punctuality accuracy, that is, the time accuracy of the clock's autonomous operation, is an important technical index to measure the performance of the clock. This indicator can be defined as: under certain external conditions, the ratio of the time the clock runs autonomously to the time deviation generated during this period. [0004] The punctual ability of the clock mainly depends on the frequency stability of the standard frequency source. Practical standard frequency sou...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G04G5/00G04G7/00G04R20/04G04R40/06
Inventor 魏丰周斌生王群朱光伟
Owner HUAZHONG UNIV OF SCI & TECH
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