Integrated post-exposure bake track

Abstract

Systems and methods for processing wafers, a combined post expose bake and chill unit, and an interface are disclosed. An exemplary system includes a lithography tool, local track, transfer device, transfer device handler, interface unit, and controller to schedule processing. An exemplary combined post expose bake and chill unit includes an enclosure having an opening in its side, and a bake unit and a chill unit in the enclosure. An exemplary interface includes a plurality of enclosures arranged around robot(s) that transfer wafers among the enclosures, one of the plurality of enclosures being an integrated bake and chill unit.

Description

[0001] This application is a divisional application of the invention patent application with the title of "Integrated Post-exposure Baking Track" filed on June 6, 2008 with the application number 200810215429.7. Technical field [0002] The present invention mainly relates to semiconductor manufacturing processes. More specifically, the present invention relates to lithography wafer systems. Background technique [0003] In semiconductor manufacturing, a processing scheme with multiple processing steps is used in a clean room environment to manufacture features on a semiconductor substrate. A cluster system is commonly used in the manufacture of semiconductor substrates, which integrates multiple process chambers to perform continuous processing steps without removing the substrate from a highly controlled processing environment. [0004] Many lithography cluster systems used in the manufacture of semiconductor integrated circuits currently combine integrated wafer tracks and litho...

AI Technical Summary

Problems solved by technology

Often, the longest process protocol step limits the throughput of the process sequence

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