Micro-processor and operation method suitable for the same
A technology of microprocessors and operating methods, applied in the direction of electrical digital data processing, instruments, machine execution devices, etc., can solve problems such as unsatisfactory performance and reduced execution speed
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[0022]The present invention provides a method that can solve the above-mentioned problems without using additional pipeline loops, but requires setting a single additional bit of each interrupt point register in each load queue entry ) and requires some additional logic. The embodiment of the present invention has the following characteristics: (1) the interrupt point range cannot cross page boundaries; (2) the different address bits of the two segments will not be translated (virtual translation into physical). Therefore, as long as the two cache lines are located on the same physical page, the translated virtual address bits in the first and second segments either match or do not match the corresponding bits of an interrupt point range. Specifically, when the load pipeline processes the first fragment (i.e., performs a breakpoint check on the virtual address of the first fragment, generates a physical address, accesses the cache, and replaces the virtual address in the addre...
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