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Wafer exposure method

An exposure method and wafer technology, which are applied in microlithography exposure equipment, photolithography process exposure devices, etc., can solve problems such as poor exposure, and achieve the effect of avoiding poor exposure.

Active Publication Date: 2011-06-08
CSMC TECH FAB2 CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

[0007] The problem solved by the present invention is the problem of poor exposure of some areas of the exposure unit in the edge area of ​​the wafer in the wafer exposure method of the prior art

Method used

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Embodiment Construction

[0025] In the semiconductor exposure process, the exposure process is usually performed by forming a photoresist layer on a wafer with several layers of film layers. In fact, each film layer is not evenly distributed on the entire wafer surface. Generally, near the center of the wafer The film layers in the area of ​​the wafer are evenly distributed and the surface is flat. Therefore, when exposing the exposure unit in the central area of ​​the wafer, there will be no problem of poor exposure in some areas due to poor focus; however, the film layers in the edge area of ​​​​the wafer are not exposed. Evenly distributed, the surface is not flat, so when exposing the exposure units in the edge area of ​​the wafer, some exposure units will deviate from the focal plane and cause poor exposure (such as underexposure), especially in semiconductor manufacturing with feature sizes smaller than 0.18 μm , due to the narrowing of the process window due to the narrowing of the line width, t...

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Abstract

The invention relates to a wafer exposure method. The method comprises the following steps of: dividing a wafer into a central area and an edge area, wherein the central area is encircled by the edge area, the edge area is 8-12 percent of whole wafer area, the wafer is divided into a plurality of exposure units, and the sizes of the exposure units are confirmed according to acquired exposure equipment; carrying out first exposure on the exposure units of the central area; and respectively carrying out secondary exposure on areas with different film thickness in each exposure unit of the edge area. Through the technical scheme, the problem of poor exposure in a certain area of the same exposure unit of the wafer edge area is avoided.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a wafer exposure method. Background technique [0002] An integrated circuit is formed by forming semiconductor devices within a few microns on the surface of a silicon wafer, and then connecting these devices to each other through metal interconnection lines to form a circuit. With the development of semiconductor technology, in order to improve product performance and save costs, the density of integrated circuits is getting higher and higher, and the feature size is getting smaller and smaller. Among them, in the semiconductor process, photolithography and exposure processes play a pivotal role. [0003] In the manufacturing process of semiconductor devices, the patterning of various layers of thin films and ion implantation of semiconductors are defined by photolithography. The specific steps include: spin-coating photoresist on the surface of the wafer to form a laye...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G03F7/20
Inventor 张辰明杨要华胡骏
Owner CSMC TECH FAB2 CO LTD
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