Cell switching method and cell switching device

A technology of cell switching and cell, which is applied in the field of data communication, and can solve problems such as increased scheduling complexity, unrealizable number of cross-point buffers, and conflicts

Active Publication Date: 2011-07-06
SANECHIPS TECH CO LTD
View PDF4 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The complexity of the scheduling algorithm increases exponentially with the increase of input and output ports. When there are many input and output ports, the complexity of the scheduling algorithm is extremely high.
[0004] On the basis of this crossbar architecture, the crossbar structure with crosspoint buffer is further developed to add a cache at each crosspoint. Although the matching algorithm is no longer required, the number of crosspoint caches required is the square of the number of input and output ports. times, in the case of a large number of ports, the number of cross-point buffers reaches an unrealizable level
[0005] The share-memory architecture uses a shared cache, which reduces the

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Cell switching method and cell switching device
  • Cell switching method and cell switching device
  • Cell switching method and cell switching device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0125] Only one RAM group is provided in the cell switching device.

[0126] Such as image 3 As shown, the cell switching method provided by the embodiment of the present invention includes:

[0127] Step S301, buffering the cell received from the input port in the first fifo corresponding to the input port;

[0128] Step S302. Determine the output port of the cell according to the destination address information or destination port information in the cell;

[0129] Step S303, according to the bit width of the first RAM group, the cell in the first fifo is split into L data blocks, and respectively written in each RAM in the first RAM group, the first RAM group includes at least L RAM, the bit width of L=cell length / first RAM;

[0130] Step S304, starting from the initial time slot allocated for the output port, through the L time slots in one cycle, read each data block of the cell sequentially from the L RAMs of the first RAM group respectively, and pass the The output ...

Embodiment 2

[0153] Multiple buffers are set in the cell switching device, which is more suitable for the situation where there are many input and output ports.

[0154] At this time, if Figure 5 As shown, the method for cell exchange includes:

[0155] Step S501, buffering the cell received from the input port in the first fifo corresponding to the input port;

[0156] Step S502, according to the bit width of the first RAM group, split the cell in the first fifo into L data blocks, start from the initial time slot allocated for the input port in advance, and pass through L time slots in one cycle Writing L data blocks in turn into the first RAM group corresponding to the group to which the input port belongs, and writing a data block into the corresponding RAM in the first RAM group for each time slot;

[0157] The starting time slots assigned to different input ports are different. In order to ensure that each data block of a cell can be written into the same address of each RAM in th...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a cell switching method and a cell switching device and relates to data communication technology. In the embodiment of the invention, a fifo (First In First Out) is added at each input port, the cell input to the corresponding input end is cached, the cell cached in each fifo is split into a plurality of data blocks and written into a shared cache, and an output port reads and outputs the cell through different time gaps to finish switching. As the fifo is added to cache the cell, different ports can respectively read and write at different time gaps when ports need to read and write the same cache, thus avoiding confliction and being easy in scheduling.

Description

technical field [0001] The present invention relates to data communication technology, in particular to a cell exchange method and device in data communication technology. Background technique [0002] In current switching devices, switching chips are generally implemented using two architectures, one is a crossbar (crossbar switch matrix) architecture, and the other is a shared-memory (shared memory) architecture. [0003] Using the crossbar architecture for cell exchange needs to consider the two-level scheduling problem of data input and output. The input and output need to be matched, that is, the input and output terminals need to be matched and scheduled according to their own idle conditions, and then negotiate with each other. The complexity of the scheduling algorithm increases exponentially with the increase of the input and output ports. When there are many input and output ports, the complexity of the scheduling algorithm is extremely high. [0004] On the basis...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H04L12/56H04L12/721
Inventor 黄炜孙明施杨宜
Owner SANECHIPS TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap