Chemical mechanical polishing method

Abstract

The invention provides a chemical mechanical polishing method. The method comprises the following steps: providing a plurality of silicon wafers with similar or same patterns, wherein the silicon wafers are provided with silicon substrates and layers to be polished on the silicon substrates; polishing the layers to be polished to target positions by utilizing chemical mechanical polishing equipment, and carrying out excessive polishing for a certain time Top, wherein an end point detection device is used for detecting a polishing end point, sending an instructor of starting excessive polishing after the end point is detected, and detecting the average polishing time T1 spent in reaching the end point when the silicon wafers are polished normally; and furthermore, when the actual polishingtime T spent when one silicon wafer in the plurality of silicon wafers is polished to the end point is less than 70 to 85% of the T1, prolonging the excessive polishing time Top of the silicon wafer to Top+(T1-T).

Description

technical field [0001] The present invention relates to a semiconductor device manufacturing method, in particular to a chemical mechanical polishing (or chemical mechanical polishing) process with improved endpoint judgment, more specifically to an improved chemical mechanical polishing method (CMP), in particular, methods for optimizing the endpoint profile of CMP for consistency in large-scale production. Background technique [0002] With the development of integrated circuit manufacturing technology, the requirements for the integration density of semiconductor devices are increasing. With the introduction of multi-layer metallization technology into the integrated circuit manufacturing process in the 1970s, the vertical space of the semiconductor wafer was effectively utilized, and the integration level of the device was significantly improved. Metallization is the process of depositing a metal film on an insulating dielectric film during chip manufacturing and then p...

AI Technical Summary

Problems solved by technology

Once a misjudgment occurs, due to the different process conditions of each step, it is difficult to completely remove these copper residues even after the next grinding step, and it will also affect the smooth removal of the subsequent barrier layer

[0011] Because these copper residues can cause short circuits or reduce chip reliability, thereby seriously affecting yield, it is necessary to find a copper CMP method that can completely remove copper residues and substantially eliminate wafer-to-wafer non-uniformity (WTWNU) in order to improve Yield and Device Reliability

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