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FPGA (Field Programmable Gate Array) implementation method based on LS-SVM (Least Squares-Support Vector Machine) algorithm restructured at runtime

A technology of LS-SVM and implementation method, which is applied in the direction of complex mathematical operation, calculation, calculation model, etc., can solve problems such as the application environment cannot be realized, and achieve the effect of improving calculation efficiency

Active Publication Date: 2013-09-11
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In addition, most of the current time series prediction algorithms, including the LS-SVM algorithm, run on general-purpose computing platforms, but in some engineering problems, this is not the best way to achieve it, and even in some application environments it cannot be implemented at all. accomplish

Method used

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  • FPGA (Field Programmable Gate Array) implementation method based on LS-SVM (Least Squares-Support Vector Machine) algorithm restructured at runtime
  • FPGA (Field Programmable Gate Array) implementation method based on LS-SVM (Least Squares-Support Vector Machine) algorithm restructured at runtime
  • FPGA (Field Programmable Gate Array) implementation method based on LS-SVM (Least Squares-Support Vector Machine) algorithm restructured at runtime

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Embodiment Construction

[0026] The LS-SVM algorithm FPGA implementation method based on runtime reconstruction described in this embodiment is:

[0027] Set static logic area and reconstruction area in FPGA,

[0028] In the static logic area, PowerPC440 is used as the main controller of the system, and the ICAP (Hardware Internal Configuration Access Port, hardware internal configuration interface) interface instantiated as a PLB (Processor Local Bus) device is used as the configuration interface. The internal block RAM is used as the program and data storage area of ​​PowerPC440; PowerPC440 is connected with DDR2 RAM through MPMC (Multi Port Memory Controller) interface, which is used to control the reading and writing of data of DDR2RAM;

[0029] The reconstruction area realizes the connection with the DDR2RAM through the NPI (Native Port Interface, local port) interface of the multi-port memory controller MPMC, and the command and data interaction between the PowerPC440 and the reconstruction area i...

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Abstract

The invention relates to an FPGA (Field Programmable Gate Array) implementation method based on an LS-SVM (Least Squares Support Vector Machine) algorithm restructured at runtime, relating to the technical field of the applications of time detection and an FPGA. In the method, a static logic area and a restructuring area are arranged in an FPGA; a PowerPC440 is used as a system main controller in the static logic area; an ICAP (Internet Content Adaptation Protocol) interface instantiated as a PLB (Payload Loop Back) device is used as a configuration interface; an inner block-RAM is used as a storage area of the program and the data of the PowerPC440; the PowerPC440 is connected with a DDR2RAM through an MPMC (Micro-Processor Memory Controller) interface for controlling the reading-writing of the data of the DDR2RAM; the restructuring area is connected with the DDR2RAM through an NPI (Network Provider Interface) of the MPMC, and the interaction of the command and the data of the restructuring area and the PowerPC440 is carried out through the DDR2RAM; a process for forming a core function array in the process of training the LS-SVM algorithm is realized by using a core function array to calculate an IP (Internet Protocol) module; a process for solving the least square is realized by using a least square to solve the IP module; and two modules are uploaded in the FPGA through the restructuring technology time division to calculate and realize the LS-SVM algorithm. In the invention, the hardware of the LS-SVM algorithm is accelerated on the platform of the FPGA; and the method is capable of realizing the process of training the LS-SVM algorithm for any scale sample.

Description

technical field [0001] The present invention relates to the technical field of time prediction, and also relates to the field of FPGA application technology. Background technique [0002] In nature, engineering technology, science, and economic society, there is an important class of data-time series data. A time series refers to a sequence of random variables arranged in time order and related to each other. For example, the precipitation sequence in meteorology, the sunspot sequence in astronomy, the brain wave sequence in medicine, the daily closing price sequence of ordinary tickets, the node flow sequence in the telecommunications industry, the state detection data sequence of aircraft engines, etc. With the continuous development of computer technology and the increasing storage capacity of storage devices, time series databases are also getting larger and larger. Analyzing and processing these massive time series and mining the valuable information behind them can re...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/16G06N99/00
Inventor 彭宇刘大同赵光权王少军刘琦庞业勇鲍文磊
Owner HARBIN INST OF TECH