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Flash memory device and data storage method thereof

A technology of data and equipment, which is applied in the field of flash memory equipment and its data storage, can solve the problems of data read and write mismatch, large NAND Flash error, coupling interference, etc., and achieve the effect of reducing capacitive coupling interference and reducing the possibility of error

Active Publication Date: 2016-04-27
NETAK TECH KO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, when the physical size is reduced to a certain extent, the capacitive coupling between the floating gates in NAND Flash will cause serious coupling interference because the distance is too close, and the interference between physically adjacent memory cells is more obvious, thus Cause data read and write mismatches
In addition, in practical applications, it is found that when non-random data is written in NAND Flash, especially TLC NAND Flash, due to interference, the probability of NAND Flash error is greater

Method used

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  • Flash memory device and data storage method thereof
  • Flash memory device and data storage method thereof
  • Flash memory device and data storage method thereof

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Embodiment Construction

[0014] figure 1 It shows a schematic structural diagram of a storage device according to an embodiment of the present application. Such as figure 1 As shown, the storage device 10 includes a scrambling module 101, a storage medium 102, and a descrambling module 103.

[0015] The scrambling module 101 is configured to randomize the data to be stored. According to an embodiment, the scrambling module 101 may include a parallel linear shift register. The number of parallelization bits of the parallel linear shift register included in the scrambling module 101 should match the width of the data input to the storage device 10. For example, when the input / output data width of the storage device IO is 8 bits, the number of parallelization bits can be 8 bits or a multiple of 8 bits.

[0016] The parallel linear shift register converts the linear shift register into a parallelized register through serial-to-parallel conversion. The linear shift register is composed of a number of series-...

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Abstract

The application provides a flash memory device and a data storage method thereof; the flash memory device comprises a scrambling module configured for randomizing to-be-stored data; a storage medium configured for storing the randomized data; and a descrambling module configured for descrambling the data read from the storage medium. The method comprises a storage process and a reading process; and the storage process comprises the steps of randomizing the to-be-stored data and storing the randomized data; and the reading process comprises the step of restoring the stored randomized data as original data. The data is scrambled when being written in the storage medium to be a randomized data according to the flash memory device and the data storage method thereof; not only is the number of continuous 1 or 0 in the written data limited, but also the data between pages can be randomly irrelative, thus, reducing a capacitive coupling interference between adjacent storage units and reducing the possibility of error.

Description

Technical field [0001] This application relates to a flash memory device and a data storage method thereof. Background technique [0002] NAND Flash (namely NANDFlash) is a non-volatile semiconductor memory that can be electrically erased and written online. It has developed rapidly due to its advantages of high storage density and fast erasing speed. In recent years, increasing the storage capacity per unit area of ​​NANDFlash is one of the development trends of NANDFlash. However, when the physical size is reduced to a certain extent, because the floating gates in NANDFlash are too close, the capacitive coupling between each other will cause serious coupling interference, and the interference between adjacent memory cells in physical locations will be more obvious. Lead to a situation where data read and write do not match. In addition, it is found in practical applications that when non-random data is written in NANDFlash, especially TLCNANDFlash, due to interference, the pr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/07
Inventor 程学敏
Owner NETAK TECH KO LTD