Single event upset resistant settable and resettable scan structure D flip-flop

Abstract

The invention discloses a single event upset resistant settable and resettable scan structure D flip-flop, aiming at improving the single event upset resistance of the single event upset resistant settable and resettable scan structure D flip-flop. The scan structure D flip-flop is composed of a clock circuit, a scanning control buffer circuit, a resetting buffer circuit, a master latch, a slave latch and an output buffer circuit, wherein the master latch is composed of 20 PMOS (P-channel Metal Oxide Semiconductor) FETs (Field Effect Transistors) and 20 NMOS (N-channel Metal Oxide Semiconductor) FETs, the slave latch is composed of 10 PMOS FETs and 10 NMOS FETs, duplication redundant reinforcement is performed on both the master latch and the slave latch, and the C2MOS (Clocked Complementary Metal Oxide Semiconductor) circuit structures in the master latch and the slave latch are improved, i.e. a pull-up circuit and a pull-down circuit in the mutually redundant C2MOS circuits are separated. The scan structure D flip-flop disclosed by the invention has strong single event upset resistance, is suitable for a standard cell library of a single event upset resistance reinforced integrated circuit, and is applied to the fields of aviation, aerospace and the like.

Description

technical field [0001] The invention relates to a master-slave D flip-flop with a settable and resettable structure and a scanning structure, in particular to a settable and resettable scanning structure D flip-flop against single event upset (signal event upset). Background technique [0002] In the universe, there are a large number of high-energy particles (protons, electrons, heavy ions) and charged particles. After the integrated circuit is bombarded by these high-energy particles and charged particles, an electronic pulse will be generated in the integrated circuit, which may cause the original level of the internal node of the integrated circuit to flip. This effect is called single event upset (SEU). The higher the LET (Linear Energy Transfer) value of a single event bombarding an IC, the stronger the resulting electron pulse. Integrated circuits used in aviation and aerospace fields are threatened by single event upsets, which can make integrated circuits work unst...

AI Technical Summary

Problems solved by technology

[0009] The technical problem to be solved by the present invention is to propose a settable and resettable anti-single event flip-flop scanning structure D flip-flop that has low anti-single event flip-flop ability. Structural D flip-flop, which can work well under single-event bombardment with higher LET values ​​without single-event flipping

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