D trigger provided with scanning structure and resisting single event upset
An anti-single-event, trigger technology, applied in the direction of electrical pulse generator circuits, pulse generation, electrical components, etc., can solve the problem of low anti-single-event flipping ability.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0031] figure 1 It is a schematic diagram of the logic structure of the anti-single event flip-flop scanning structure D flip-flop of the present invention. The present invention consists of a clock circuit (such as figure 2 shown), scan control buffer circuit (such as image 3 shown), the master latch (as Figure 4 shown), slave latches (as Figure 5 shown), the first inverter circuit (such as Figure 6 shown) and a second inverter circuit (as Figure 7 shown) composition. The present invention has four inputs and two outputs. The four input terminals are CK, which is the clock signal input terminal, D, which is the data signal input terminal, SE, which is the scanning control signal input terminal, and SI, which is the scanning data input terminal; the two output terminals are Q and QN respectively, and Q and QN output one to the opposite data signal. The clock circuit receives CK, and outputs C and CN respectively after buffering CK. The scan control buffer circui...
PUM
Abstract
Description
Claims
Application Information
- R&D Engineer
- R&D Manager
- IP Professional
- Industry Leading Data Capabilities
- Powerful AI technology
- Patent DNA Extraction
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com