Semiconductor chip with stair arrangement bump structures

Abstract

Various semiconductor chip input / output structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first conductor structure on a first side of a semiconductor chip and forming a second conductor structure in electrical contact with the first conductor structure. The second conductor structure is adapted to be coupled to a solder structure and includes a stair arrangement that has at least two treads.

Description

technical field [0001] The present invention relates generally to semiconductor processing, and more particularly, to semiconductor chip solder bump pads and methods of forming solder bump pads. Background technique [0002] Flip-chip mounting schemes have been used for decades for mounting semiconductor chips onto circuit boards, such as semiconductor chip packaging substrates. In many conventional flip-chip variations, multiple solder joints are created between input / output (I / O) locations on the semiconductor chip and corresponding I / O locations on the circuit board. In one conventional process, solder bumps are metallurgically bonded to a given I / O site or pad of a semiconductor chip, and so-called pre-solder is metallurgically bonded to the corresponding I / O pads on the circuit board. / O position. Thereafter, the solder bump and pre-solder are brought into proximity and one or both of the solder bump and pre-solder are subjected to the heating process of reflow to cre...

AI Technical Summary

Problems solved by technology

[0004] Flip chip solder joints may be subjected to mechanical stress from various sources such as thermal expansion coefficient mismatch, differences in ductility and board deformation

This stress subjects the conventional UBM structure just described to the bending moment

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