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Heterogeneous multi-core processor of two-stage computing architecture

A multi-core processor and heterogeneous technology, applied in machine execution devices, concurrent instruction execution, etc., can solve the problems of low computing efficiency, poor computing balance and regularity, reduce communication consumption, enhance integrity, and ensure continuity. and occlusive effects

Active Publication Date: 2012-07-25
上海思朗科技有限公司
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  • Abstract
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  • Application Information

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Problems solved by technology

[0005] The technical problem to be solved by the present invention is that heterogeneous multi-core processors have poor operatio

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  • Heterogeneous multi-core processor of two-stage computing architecture
  • Heterogeneous multi-core processor of two-stage computing architecture
  • Heterogeneous multi-core processor of two-stage computing architecture

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Abstract

The invention discloses a heterogeneous multi-core processor, which comprises a wide data stream computing module, a control/call module and a data interaction module. The wide data stream computing module executes algebra instructions to complete intensive computing of wide data streams of large blocks, surfaces, lines and the like. The control/call module executes scalar instructions to complete setting of top-level parameters for wide data stream computing and control computing of the parameters while completing discontinuous secondary computing of the wide data stream computing. The data interaction module is used for completing interconnection of the whole heterogeneous multi-core processor and data interaction. When in use of the heterogeneous multi-core processor on the basis of the two-stage computing architecture, the wide data stream computing and the control/call type computing are separated from each other, integrity of data stream is enhanced greatly, continuity and closure of intensive computing are guaranteed, communication consumption among the computing nodes is lowered, and accordingly service efficiency of different computing modules is increased greatly.

Description

technical field [0001] The invention relates to the field of computer multi-core processors, in particular to a heterogeneous multi-core processor with a two-stage computing architecture. Background technique [0002] Modern processors need to face massive computing tasks in different fields. The multi-core of the processor and the vectorization of the instructions have become an effective means to solve this problem. Considering the composition structure and data flow characteristics of general application algorithms, there are usually two types of operations. One is a wide data stream operation that has a long data width and requires a large number of continuous and repetitive calculation actions to complete. This type of operation is the part that consumes the most computing resources in the fields of image / video, radar, communication, and scientific computing, and its main calculation steps are very suitable for multi-core vector processors to complete. The other part...

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Application Information

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IPC IPC(8): G06F9/38
Inventor 王东琳蒿杰谢少林杜学亮林啸
Owner 上海思朗科技有限公司
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