Manufacturing method of semiconductor device

A semiconductor and device technology, which is applied in the field of semiconductor device manufacturing, can solve the problems of semiconductor device performance deviating from long channel characteristics, semiconductor device threshold voltage control leakage and other characteristics of adverse effects, so as to ensure reliability, reduce junction capacitance, Effect of reducing junction destabilization

Active Publication Date: 2015-09-09
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

However, when the channel length is shortened to be comparable to the sum of the depletion layer widths of the source and drain, the perturbation caused by the channel edges (such as the source, drain, and insulating region edges) becomes more significant, The performance of semiconductor devices will deviate from the original long channel characteristics
For example, in short-channel conditions, the threshold voltage (i.e., the turn-on voltage of the gate) decreases as the drain voltage increases, which adversely affects the characteristics of semiconductor devices such as threshold voltage control and leakage

Method used

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  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device

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Embodiment Construction

[0029] In the following description, a lot of specific details are given in order to provide a more thorough understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features known in the art are not described.

[0030] figure 1 Shows a process flow chart of manufacturing a semiconductor device according to an embodiment of the present invention, Figure 2A-2K Shows a cross-sectional view of a device obtained at each step in the process flow of manufacturing a semiconductor device according to an embodiment of the present invention. The following will combine figure 1 with Figure 2A-2K The production method of the present invention will be described in detail.

[0031] Step 101 is performed to provide a semiconductor substrate on which a first gate structure located in a core...

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Abstract

The invention discloses a method for manufacturing a semiconductor device, comprising the steps of: providing a semiconductor substrate on which a first gate structure located in the core area and a second gate structure located in the peripheral area are formed; forming a first photoresist layer in the core area; performing pocket implantation and lightly doped drain implantation in the peripheral area to form a second pocket implantation region and a second lightly doped region in the semiconductor substrate on both sides of the second gate structure; removing the first photoresist layer; performing pre-amorphization implantation to form an amorphous layer in the semiconductor substrate not covered by the first gate structure and the second gate structure; forming a second photoresist layer in the peripheral area; and performing pocket implantation and lightly doped drain implantation in the core area to form a first pocket implantation region and a first lightly doped region in the semiconductor substrate on both sides of the first gate structure. The method of the invention can help reduce junction mutability and junction capacitance of the core area while ensuring reliability of hot electron injection of devices in the peripheral area.

Description

Technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a manufacturing method of a semiconductor device. Background technique [0002] With the increasing demand for high integration and high performance of VLSI, the critical size of semiconductor devices is getting smaller and smaller. However, when the channel length is shortened to be comparable to the sum of the width of the depletion layer of the source and drain, the disturbance caused by the edge of the channel (such as the edge of the source, drain, and insulating region) becomes more significant. The performance of semiconductor devices will deviate from the original long channel characteristics. For example, in short channel conditions, the threshold voltage (that is, the turn-on voltage of the gate) will decrease as the drain voltage increases, which will adversely affect the threshold voltage control and leakage characteristics of the semiconductor device. The above-m...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/28H01L21/265
Inventor 甘正浩
Owner SEMICON MFG INT (SHANGHAI) CORP
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