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Manufacture process of copper interconnection line

A manufacturing process and interconnection technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., to reduce etching steps, reduce manufacturing costs, and increase productivity

Inactive Publication Date: 2013-02-20
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since the double patterning technology requires two photolithography and etching, its cost is much higher than the traditional single exposure forming technology

Method used

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  • Manufacture process of copper interconnection line
  • Manufacture process of copper interconnection line
  • Manufacture process of copper interconnection line

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Experimental program
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Embodiment Construction

[0031] The specific embodiment of the present invention will be further described below in conjunction with accompanying drawing:

[0032] Figures 3a-3i It is a schematic structural flow diagram of a copper interconnection method of the present invention;

[0033] Such as Figures 3a-3i As shown, a manufacturing process of a copper interconnection in the present invention, first, deposit a low dielectric constant dielectric layer 32 on the upper surface of a silicon substrate 31, and coat the first photoresist 33 that can form a hard mask to cover the dielectric layer 32, after exposure and development, the excess photoresist is removed to form a first hard mask photoresist 331 with a metal groove structure 34; wherein, the material of the first photoresist 33 contains silane groups, silane oxides Base or clathrate siloxane, etc.

[0034] Secondly, in the same developing station, coat a curing material 35 such as a polyamine compound such as the materials disclosed in US P...

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Abstract

The invention relates to the semiconductor manufacture field and particularly relates to a manufacture process of a copper interconnection line. According to the manufacture process of the copper interconnection line, an isolating membrane is formed between two layers of light resistance in a double exposure technology by using polyamine compound materials in a copper interconnection process with grooves preferred, and through holes and metal groove structures in the light resistance are transferred to a media layer successively, so that the prior art that metal groove etching and through hole etching are divided into two independent steps is replaced, etching steps in a dual damascene metal interconnection line process are effectively reduced, the productivity is improved, and the manufacture cost is decreased.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a manufacturing process of copper interconnection wires. Background technique [0002] As the integration level of semiconductor chips continues to increase, the feature size of transistors continues to shrink. [0003] When the characteristic size of transistors enters the 130nm technology node, due to the high resistance of aluminum, copper interconnection gradually replaces aluminum interconnection and becomes the mainstream of metal interconnection. Now the widely used method of making copper wire is damascene technology. , in which the trench-first dual-damascene process is one of the methods to realize the one-time forming of copper wires and through-hole copper. [0004] Figures 1a-1f It is a schematic structural flow diagram of groove priority double damascene process in the background technology of the present invention; as Figures 1a-1f As shown, after depo...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768H01L21/027
Inventor 毛智彪
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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