Method of manufacturing circuit pattern through sputtering technology and rewiring method of chip

A technology of circuit pattern and sputtering process, applied in circuits, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of complex process and many steps, and achieve the effect of reducing etching steps, shortening process flow, and reducing process difficulty
CN102427058BActive Publication Date: 2015-07-22SHENNAN CIRCUITS
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SHENNAN CIRCUITS
Publication Date
2015-07-22

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Abstract

The invention discloses a method of manufacturing a circuit pattern through a sputtering technology and a rewiring method of a chip; the method of manufacturing the circuit pattern through the sputtering technology comprises the following steps of: arranging a jig between a component to be sputtered and a cathode of sputtering equipment, and arranging a through groove with a set shape on the jig; starting the sputtering equipment, leading atoms sputtered by the cathode to pass through the through groove and then be adhered on the surface of the component, and forming the circuit pattern. According to the technical scheme of the embodiment, the circuit pattern with the set shape can be directly manufactured by sputtering; and compared with the traditional technical scheme of firstly sputtering a whole surface and then etching the circuit pattern, the technical scheme has the advantages that an etching step is omitted, a technological process is shortened and the technology difficulty is reduced.
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Description

technical field

[0001] The invention relates to the technical field of circuit board production, in particular to a method for producing circuit patterns through a sputtering process and a chip rewiring method. Background technique

[0002] Integrated circuit (Integrated Circuit, IC) chips have a tendency to develop towards high density and multi-function. At present, the thinnest circuit on the chip has reached 28nm. While the line density is increasing, the input / output port (input / output, I / O) density of the chip is also increasing, and the commonly used four-sided array outlet method on the chip has been difficult to meet the requirements.

[0003] Therefore, a re-distribution (retry design line, RDL) process of converting quadrilateral array pads into area array pads appears. Using the RDL process, the array pads on the four sides of the chip can be converted into the surface array pads in the middle of the chip, and the size and spacing of the pads can be increased t...

Claims

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