Floating diode and method of making the same

Abstract

The invention discloses a floating diode and a manufacturing method of the floating diode, wherein the floating diode comprises a first doped region located in a semiconductor substrate, a second doped region located in the first doped region, and a third doped region located in the second doped region. A first heavily doped region is arranged on the surface, of the semiconductor substrate which is located outside a boundary of the first doped region. A second heavily doped region is arranged on the surface of the semiconductor substrate between the boundary of the first doped region and a boundary of the second doped region. A first heavily doped region and two second heavily doped regions are arranged on the surface of the semiconductor substrate inside the third doped region, wherein the doping type of the first doped region, the doping type of the third doped region and the doping type of the second heavily doped region are the same, the doping type of the second doped region, the doping type of the semiconductor substrate and the doping type of the first heavily doped region are the same, and the doping type of the first doped region and the doping type of the second doped region are opposite. According to the technical scheme, the precondition that Vk of a floating diode in the prior art is needed to be greater than 0 in the process of use is solved, and minority carriers are prevented from injecting the substrate at the same time.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a floating diode and a manufacturing method thereof. Background technique [0002] Floating diodes can be implemented using a CMOS process, so they are widely used. Such as figure 1 As shown, it is a floating diode with an existing structure. It includes a p-type semiconductor substrate 100 with an n-type doped region 20 forming an N well. There are also two symmetrical n+ type doped regions 22 located at both ends of the N well 20 and a p+ type doped region 21 located in the middle of the two n+ type doped regions 22 . The surface of the semiconductor substrate 100 outside the N well 20 has a p+ type doped region. Wherein, the two n+ type doped regions 22 in the N well 20 are electrically connected to each other, and serve as the cathode Vk of the floating diode, and the p+ type doped regions 21 in the N well 20 are electrically connected to lead out the The anode...

AI Technical Summary

Problems solved by technology

[0004] The invention utilizes the existing doping in the high-voltage process to solve the condition that the floating diode is limited by Vk less than GND

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