MOSFET and preparation method thereof

A device and substrate technology, applied in the field of MOSFET devices and their preparation, can solve the problems of lateral diffusion, increase of source-drain series resistance, and larger device size, so as to eliminate lateral diffusion, reduce source-drain series resistance, and improve operation speed effect

Active Publication Date: 2014-01-22
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The reduction in the size of the MOSFET brings the above advantages, but it also causes many negative effects. For example, with the reduction of the device size, the gate stack structure is further reduced, and the channel between the source and drain is further reduced. Therefore, It is easy to cause the short channel effect. In addition, when the source and drain are doped, it is easy to cause the lateral diffusion of the source and drain. The lateral diffusion of the source and drain will interfere with the normal operation of the device. In the prior art, in order to solve the lateral diffusion of the source and drain and the resulting Most of the disadvantages of the gate stack structure are to form thicker partition walls on both sides of the gate stack structure, and then do the source and drain doping to increase the distance between the source and drain during source and drain implantation, so as to eliminate the lateral diffusion between the source and drain. However, when the partition wall of the gate stack structure is too thick, it will cause new problems. For example, thickening the partition wall will inevitably lead to a larger device size, and it will also cause an increase in the source-drain series resistance.

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Embodiment approach

[0041] According to one embodiment of the present invention, a method for forming a shallow trench isolation structure includes the following steps:

[0042] First, a first oxide layer and a first nitride layer are sequentially formed on the semiconductor substrate 101 . The first oxide layer can be obtained by high temperature oxidation, and its thickness can be 100-200 angstroms. The first oxide layer may serve as an isolation layer to protect the semiconductor substrate 101 from damage and contamination. The first nitride layer may be formed by a chemical vapor deposition (CVD) method, a physical vapor deposition (PVD) method, an atomic layer deposition (ALD) method, or the like. As an example, the first nitride layer may be formed by low pressure chemical vapor deposition using ammonia and dichlorosilane at a temperature of about 750°C. The first nitride layer can not only be used as a mask layer during the etching process of the semiconductor substrate 101, but also can...

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Abstract

The invention relates to a preparation method of a MOSFET. The method comprises: providing a semiconductor substrate, the semiconductor substrate having shallow trench isolation formed therein; forming a gate structure on the semiconductor substrate; forming gate isolation walls at the two sides of the gate structure; etching the substrate by taking the gate isolation walls as mask layers so as to form a first trench in the source-drain area of the substrate; forming second isolation walls at the side wall of the first trench and the two sides of the gate isolation walls; performing isotropy etching on the semiconductor substrate by taking the second isolation walls as mask layers so as to form a second trench; selectively epitaxially growing an epitaxial layer on the surface of the second trench, at the same time of epitaxy, performing an original position doping with a type opposite from the type of a source drain; etching and removing the second isolation walls; selectively epitaxially growing the source drain, at the same time of the epitaxy, performing original position doping; and forming third isolation walls at the two sides of the gate isolation walls. By using the method, the problem of transverse diffusion of source / drain in the prior art can be eliminated, and the source drain series resistance can be reduced.

Description

technical field [0001] The invention relates to the field of semiconductor device preparation, in particular, the invention relates to a MOSFET device and a preparation method thereof. Background technique [0002] Metal-Oxide-Semiconductor-Field-Effect Transistor (MOSFET) is a field-effect transistor that can be used in analog circuits and digital circuits. A typical MOSFET device includes a gate, a source, and a drain. The source and drain are close to the gate. The very bottom region is also formed with a lightly doped region (LDD region). Due to the advantages of low manufacturing cost, small use area, and high integration, it is widely used in large-scale integrated circuits (Large-Scale Integrated Circuits, LSI) or ultra-large It is widely used in the field of integrated circuits (Very Large-Scale Integrated Circuits, VLSI). [0003] With the increasing progress of the manufacturing process of semiconductor integrated circuits, in the past few decades, in order to obt...

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Application Information

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IPC IPC(8): H01L21/336H01L21/20H01L29/78
CPCH01L29/1037H01L29/66477H01L29/78
Inventor卜伟海王文博
OwnerSEMICON MFG INT (SHANGHAI) CORP