Manufacturing method of semiconductor device

Abstract

The invention provides a manufacturing method of a semiconductor device. The manufacturing method comprises the following steps that a substrate is provided, and the substrate is provided with a plurality of first isolation structures and a plurality of second isolation structures in alternate arrangement; an insulation projection part is formed on each second isolation structure of the substrate; a conducting gap wall is respectively formed on the two opposite side walls of each insulation projection part for exposing each first isolation structure; an insulation layer is formed on each exposed first isolation structure. Through the manufacturing method, a mask pattern layer only covers a silicon oxide layer corresponding to the second isolation structures, so the opening depth-to-width ratio in the insulation layer is reduced, further, the occurrence of the problem of bridge connection caused by opening bottom reduction or etching incompleteness in the etching process can be reduced, and the possibility of defect generation of subsequently formed contact insertion plugs is reduced.

Description

technical field [0001] The present invention relates to a semiconductor technology, in particular to a method of manufacturing a semiconductor device with a small-sized contact plug. Background technique [0002] In the nano-semiconductor process, with the evolution of integrated circuits towards high density and small volume, the requirements for critical dimensions (Critical Dimension) are getting smaller and smaller, and the relative opening aspect ratio (High AspectRatio) is getting higher and higher. , so the technical challenges to the etching process are also increasing. However, in the small critical dimension and high aspect ratio opening etching process, due to the shrinkage of the bottom of the opening in the interlayer dielectric (ILD) layer or intermetal dielectric (inter-metal dielectric (IMD) layer) The opening or incomplete etching causes bridging of the dielectric layer adjacent to the bottom of the opening, resulting in defects such as poor contact or elec...

AI Technical Summary

Problems solved by technology

[0005] The invention provides a method for manufacturing a semiconductor device to solve the problem in the prior art that bridging is easily caused by incomplete etching of the bottom

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