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Memory controlling device and method thereof

A technology of a control device and a control method, which is applied in the direction of static memory, memory system, digital memory information, etc.

Active Publication Date: 2014-07-02
IND TECH RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] For the memory power consumption of portable devices, there is currently no technology that effectively utilizes the Partial Array Self Refresh (PASR) function to reduce memory power consumption

Method used

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  • Memory controlling device and method thereof
  • Memory controlling device and method thereof
  • Memory controlling device and method thereof

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Embodiment Construction

[0154] The detailed features and advantages of the present invention are described in detail below in the embodiments, and the contents are sufficient to enable those skilled in the art to understand the technical content of the present invention and implement them accordingly, and according to the contents disclosed in this specification, claims and drawings, any Objects and advantages associated with the present invention can be readily understood by those skilled in the art.

[0155] The present invention provides a memory control device for controlling a memory having a partial array self-refresh (PASR) function and having a plurality of storage segments.

[0156] First, please refer to " figure 1 ”, which is a block diagram of a memory control device of an embodiment. According to an embodiment, the memory control device 30 includes a PASR configuration register 31 , an address remapper 32 , an address decoder 33 and an address selector 34 . The memory 40 can be, for ex...

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Abstract

A memory controlling device and method are disclosed for controlling a memory having a partial array self refresh (PASR) function and a plurality of memory segments. The memory controlling device comprises an address mapper, an address decoder, an address selector, and a PASR configuration register storing a PASR configuration. The address mapper converts an input address set into a mapped address set according to an address offset. The mapped address set comprises a plurality of consecutive mapped addresses or at least one mapped address within a limited range. The address decoder updates the PASR configuration during writing. The address selector generates an updated address set, which is used for setting at least one mode register of the memory, according to the PASR configuration register under a sleep-or-standby mode in order that the memory can self refresh at least one of the memory segments correspondingly.

Description

technical field [0001] The present invention relates to a memory control device for controlling a memory with a partial array self-refresh (PASR) function. Background technique [0002] As portable device functionality continues to increase, performance and battery life must also increase accordingly. The design of these devices faces the problem of how to reduce power consumption so as to extend battery life and standby time. From another trend, the smartphone market also drives the growth of memory shipments. In the future, the demand for memory capacity of portable devices will become larger and larger, so how to reduce the power consumption of the memory will receive more attention. [0003] Regarding the memory power consumption of portable devices, there is currently no technology that effectively utilizes the partial array self-refresh (Partial Array Self Refresh, PASR) function to reduce the memory power consumption. SUMMARY OF THE INVENTION [0004] The present...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/32
CPCG11C11/40615G11C2211/4067G11C11/40611G11C11/40622G06F12/0223Y02D10/00
Inventor 王茂银卢俊铭
Owner IND TECH RES INST