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Method and host device for assessing execution of trim commands

A host device, pruning instruction technology, applied in the input/output process of data processing, memory address/allocation/relocation, instruments, etc., can solve the problem of lack of pruning instruction validity analysis ability and so on

Inactive Publication Date: 2015-01-07
SANDISK TECH LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Microsoft's Performance Toolkit includes the ability to record I / O at the driver level, but it lacks the analysis capabilities needed to properly evaluate the effectiveness of pruning instructions to optimize performance

Method used

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  • Method and host device for assessing execution of trim commands
  • Method and host device for assessing execution of trim commands
  • Method and host device for assessing execution of trim commands

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0010] Examples of hosts and storage

[0011] Turn to the attached picture below, figure 1 is a block diagram of a host device 50 in communication with a storage device 100 of one embodiment. As used herein, "in communication with" may mean communicating directly or indirectly via one or more components, which may or may not be shown or described herein. For example, the host device 50 and the storage device 100 may respectively have mating physical connectors (interfaces) that allow the storage device 100 to be detachably connected to the host device 50 . Host device 50 may take any suitable form, such as, but not limited to, a mobile phone, digital media player, gaming device, personal digital assistant (PDA), personal computer (PC), kiosk, set-top box, television system, book reader, or any combination of them.

[0012] In this embodiment, the storage device 100 is a mass storage device and takes the form of a solid state drive (SSD), as such storage devices currently ...

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PUM

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Abstract

A method and host device for assessing execution of trim commands are provided. In one embodiment, a trace of trim and write commands sent to a storage device are obtained. For each trim command in the trace, a subsequent write command to a same logical block address (LBA) as the trim command is identified, and an elapsed time between the trim and write commands is calculated. This information can be used to display a histogram and / or to optimize when the storage device executes trim commands and / or when the host device issues trim commands.

Description

technical field [0001] This application claims priority to US Provisional Application No. 61 / 654,006, filed May 31, 2012, which is hereby incorporated by reference. Background technique [0002] Non-volatile memory storage devices based on NAND technology employ erase / program cycles which can impact performance if there are no free blocks at the time of writing. Current NAND-based storage devices improve performance by actively erasing memory blocks when they are not in use. Currently, some host devices can send a “trim” command to the NAND, thereby indicating that a certain Logical Block Address (LBA) of the storage device is no longer used by the file system of the host. However, efficient use of pruning commands requires tuning and analysis to ensure that enough free blocks are obtained and that the pruning commands themselves do not degrade system performance / durability. Microsoft's Performance Toolkit includes the ability to record I / O at the driver level, but it lack...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06G06F12/02
CPCG06F3/0659G06F3/0679G06F3/0653G06F11/3419G06F12/0246G06F3/061G06F11/3485
Inventor O.科恩E.索博尔O.吉拉德J.G.哈恩
Owner SANDISK TECH LLC