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Thin film transistor and its manufacturing method

A technology of thin film transistor and manufacturing method, applied in transistor, semiconductor/solid-state device manufacturing, electric solid-state device and other directions, can solve the problem of inability to increase the aperture ratio and the like

Active Publication Date: 2017-12-12
HONG FU JIN PRECISION IND (SHENZHEN) CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the width of the formed channel is restricted by the patterning accuracy of the mask in the photolithography process, it will have a certain width and cannot be made shorter, so the aperture ratio cannot be increased.

Method used

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  • Thin film transistor and its manufacturing method
  • Thin film transistor and its manufacturing method
  • Thin film transistor and its manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0019] see figure 1 A thin film transistor 100 provided in the first embodiment of the present invention includes a substrate 10 and a gate 20 formed on the substrate 10, a gate insulating layer 30, a semiconductor layer 40, an etching stopper layer 50, a drain electrode 60, a source Pole electrode 70, protective layer 80.

[0020] The substrate 10 is an insulating substrate, which may be an insulating material such as glass, quartz or ceramics. In this embodiment, the substrate 10 is a glass substrate.

[0021] The gate 20 is formed on the surface of the substrate 10 , the gate insulating layer 30 covers the gate 20 and is formed on the surface of the substrate 10 , and the gate insulating layer 30 includes silicon nitride and / or silicon oxide.

[0022] The semiconductor layer 40 is formed on the gate insulating layer 30 and is located directly above the gate 20. The semiconductor layer 40 is made of an amorphous oxide semiconductor material (Amorphous Oxide Semiconductor, ...

Embodiment approach 2

[0036] see figure 2 The difference between the thin film transistor 200 provided in the second embodiment of the present invention and the thin film transistor 100 in the first embodiment is that the drain electrode 60 of the thin film transistor 200 is made of a transparent conductive film layer 60a and a layer laminated on the transparent conductive film layer 60a The upper metal layer 60b is formed. In this embodiment, the transparent conductive film layer 60a is an ITO layer.

[0037] The manufacturing method of the thin film transistor 200 provided in the second embodiment of the present invention includes the following steps:

[0038] Step 1: providing a substrate 10, and forming a gate 20, a gate insulating layer 30, and a semiconductor layer 40 on the substrate. The method for forming the gate 20 , the gate insulating layer 30 and the semiconductor layer 40 is the same as above.

[0039] Step 2: forming an etching stopper layer 50 on the semiconductor layer 40 .

...

Embodiment approach 3

[0045] see image 3 The difference between the thin film transistor 300 provided in the third embodiment of the present invention and the thin film transistor 100 in the first embodiment is that the semiconductor layer 40 of the thin film transistor 300 is formed in the trench between the drain electrode 60 and the source electrode 70 90 , and extend to the upper surfaces of the drain electrode 60 and the source electrode 70 , respectively.

[0046] The manufacturing method of the thin film transistor 300 provided in the third embodiment of the present invention includes the following steps:

[0047] Step 1: providing a substrate 10 and forming a gate 20 and a gate insulating layer 30 on the substrate.

[0048] Step 2: Forming the drain electrode 60 on the gate insulating layer 30 by using a photolithography process. The drain electrode 60 is made of metal material.

[0049] Step 3: Forming the source electrode 70 on the gate insulating layer 30 by another photolithography ...

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PUM

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Abstract

Disclosed is a thin film transistor. The thin film transistor comprises a substrate, a grid, a semiconductor layer, a source electrode and a drain electrode, wherein the grid, the semiconductor layer, the source electrode and the drain electrode are formed on the substrate. The source electrode and the drain electrode are formed in different photoetching manufacturing processes. According to the thin film transistor, the width of a channel between the drain electrode and the source electrode cannot be limited by the working accuracy of patterns of a mask in the same photoetching manufacturing process, and the channel can be made smaller. The invention further provides a manufacturing method of the thin film transistor.

Description

technical field [0001] The invention relates to a thin film transistor and a manufacturing method thereof. Background technique [0002] A traditional bottom-gate thin film transistor generally includes a substrate, a gate formed on the substrate in sequence, a gate insulating layer, a semiconductor layer, and a source electrode and a drain electrode. A channel is formed between the source electrode and the drain electrode. . Usually, if the width of the channel is too wide, the overall size of the thin film transistor will be too large, thereby affecting the aperture ratio of the pixel. Therefore, in order to increase the aperture ratio, the size of the thin film transistor needs to be reduced, so the width of the channel must also be increased. make small. [0003] Generally, the source electrode and the drain electrode are constructed with the same metal layer, and then the metal layer is processed by a photolithography process to form the source electrode, the drain el...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/786H01L29/06H01L21/34H01L27/12
CPCH01L27/1214H01L29/0847H01L29/66742H01L29/786
Inventor 安生健二
Owner HONG FU JIN PRECISION IND (SHENZHEN) CO LTD