Resistance Variable Memory Structure and Method of Forming the Same
A memory and electrode structure technology, applied in the direction of electric solid-state devices, circuits, electrical components, etc.
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[0027] The making and using of illustrative embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are illustrative only, and do not limit the scope of the invention.
[0028] According to one or more embodiments of the present invention, at least one variable resistance memory structure is formed within a semiconductor chip region of a substrate. A plurality of semiconductor chip regions are marked on the substrate by scribe lines between the chip regions. The substrate will undergo various cleaning, layering, patterning, etching and doping steps to form semiconductor structures. The term "substrate" herein generally refers to a bulk semiconductor substrate on which various layers and device structures are formed. In some embodiments, the bulk substrate includes silicon or a compound se...
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