Initializing method and circuit of head and tail pointer chain table storage

A table memory and initialization technology, which is applied in the direction of instruments, electrical digital data processing, data conversion, etc., can solve the problems of long initialization time, inability to meet immediate reset and immediate work, and not suitable for use in safety-critical systems, so as to reduce initialization delay Effect

Active Publication Date: 2015-05-06
西安翔腾微电子科技有限公司
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AI Technical Summary

Problems solved by technology

If there are many storage units, the initialization time is very long, which cannot meet the requirements of immediate reset and immediate work, and is not suitable for use in safety-critical systems

Method used

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  • Initializing method and circuit of head and tail pointer chain table storage

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Embodiment Construction

[0041] The technical solutions of the present invention are clearly and completely described below in conjunction with the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work are all Belong to the protection scope of the present invention.

[0042] Such as figure 1 Shown, a kind of initialization circuit of head and tail pointer linked list memory, comprises free queue, multiple buffer queues, free storage unit counter, linked list initialization counter and linked list update control unit; Each buffer queue includes buffer head pointer register, buffer tail pointer Register, buffer queue number, and a plurality of buffer frame data dynamically linked by the buffer queue head pointer and tail pointer in the linked list memory, the...

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Abstract

The invention relates to an initializing method and circuit of a head and tail pointer chain table storage. The circuit comprises a free queue, a plurality of buffer queues, a free storage unit counter, a chain table initialization counter and a chain table update control unit. A head pointer register and a tail pointer register of each buffer queue are connected with the chain table update control unit, a head pointer and a tail pointer of the free queue are connected with the chain table update control unit, the chain table update control unit is connected with the output end of the free storage unit counter, the output end of a chain table storage and the output end of the chain table initialization counter, a count result and a parameter D output by the chain table initialization counter are connected with the two input ends of a comparator respectively, and the output end of the comparator is connected with the enabling end of the chain table initialization counter. By means of the initializing method, initialization of the queue head and tail pointer storage is achieved, initialization delay is reduced, the requirements for immediate reset and immediate work are met, the method is suitable for various application environments due to parameter setting, and configuration flexibility is improved.

Description

technical field [0001] The invention belongs to computer hardware technology, and relates to a queue head and tail pointer memory initialization method and circuit. Background technique [0002] In computer communication, as the amount of application data continues to increase, the storage efficiency of the memory is required to be higher and higher, and the method of dynamic memory management is required. The linear linked list is a data structure often used in dynamic memory management. The application of multiple queues through their respective linked list memory is also becoming more and more extensive. The linked list memory includes a plurality of storage units, an address decoding circuit and a read-write control circuit, and each storage unit stores frame control information and a linked list pointer. The initialization method of the linked list memory is as follows: when the linked list memory is powered on, the existing initialization circuit is used to sequential...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F5/12
Inventor 李哲张荣华王治杨峰夏大鹏楼晓强
Owner 西安翔腾微电子科技有限公司
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