Initializing method and circuit of head and tail pointer chain table storage

Abstract

The invention relates to an initializing method and circuit of a head and tail pointer chain table storage. The circuit comprises a free queue, a plurality of buffer queues, a free storage unit counter, a chain table initialization counter and a chain table update control unit. A head pointer register and a tail pointer register of each buffer queue are connected with the chain table update control unit, a head pointer and a tail pointer of the free queue are connected with the chain table update control unit, the chain table update control unit is connected with the output end of the free storage unit counter, the output end of a chain table storage and the output end of the chain table initialization counter, a count result and a parameter D output by the chain table initialization counter are connected with the two input ends of a comparator respectively, and the output end of the comparator is connected with the enabling end of the chain table initialization counter. By means of the initializing method, initialization of the queue head and tail pointer storage is achieved, initialization delay is reduced, the requirements for immediate reset and immediate work are met, the method is suitable for various application environments due to parameter setting, and configuration flexibility is improved.

Description

technical field [0001] The invention belongs to computer hardware technology, and relates to a queue head and tail pointer memory initialization method and circuit. Background technique [0002] In computer communication, as the amount of application data continues to increase, the storage efficiency of the memory is required to be higher and higher, and the method of dynamic memory management is required. The linear linked list is a data structure often used in dynamic memory management. The application of multiple queues through their respective linked list memory is also becoming more and more extensive. The linked list memory includes a plurality of storage units, an address decoding circuit and a read-write control circuit, and each storage unit stores frame control information and a linked list pointer. The initialization method of the linked list memory is as follows: when the linked list memory is powered on, the existing initialization circuit is used to sequential...

AI Technical Summary

Problems solved by technology

If there are many storage units, the initialization time is very long, which cannot meet the requirements of immediate reset and immediate work, and is not suitable for use in safety-critical systems

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