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A storage method for executable code under armv7m architecture

A technology for executing code and code, applied in the field of off-chip Flash without XIP, can solve problems such as affecting product price, low chip performance, difficult application, etc., to achieve the effect of low cost, low memory consumption, and cost reduction

Active Publication Date: 2018-03-23
FUJIAN CENTM INFORMATION
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the MCU of the ARM v7m architecture is difficult to be applied to devices in complex application scenarios due to the above-mentioned limitation of the space that can directly store executable code
This makes devices with complex application scenarios have to use ARM9 / ARM11 processors with low chip performance, or high-cost processors such as ARM v7r and ARM v7a, which in turn affects the cost performance of products.

Method used

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  • A storage method for executable code under armv7m architecture

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Embodiment Construction

[0013] Such as figure 1 As shown, the method of the present invention mainly involves five logic units, which are: compiling and burning program 1, startup program 2, FPB related program 3, execution program 4, and bus exception handling program 5. The coordination of these five logic units in the overall process is as follows figure 1 Shown. The software implementation of the four logic units, the startup program 2, the FPB associated program 3, the execution program 4, and the bus exception handler 5, are all stored in a code memory natively supported by the CPU, for example, stored in an on-chip Flash or ROM.

[0014] In the compilation and burning program 1, through the parameter configuration of the compiler, the startup program 2, the FPB related program 3, the execution program 4, the bus exception handler 5, the system and the driver program are located in the physical memory of the CPU chip. Locate other programs in the Flash address space without physical memory associa...

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Abstract

The present invention provides a method for storing executable codes under the ARMv7m architecture, which is composed of five logic units including compiling and burning programs, startup programs, FPB related programs, execution programs, and bus exception handling programs, and a piece of RAM space is allocated through the FPB related programs Associated with an address that is not associated with the physical Flash, it is used as a storage space for storing executable code for the CPU core to obtain and execute machine instructions. At the same time, the RAM space can be dynamically updated to a new value, and can be reset and associated with a new Flash address by the FPB. In this way, the method of the present invention only uses a small piece of internal Flash to store the FPB management code, and can expand the storage space of the executable code of the CPU to 512MB by using a small RAM space and cheap off-chip Flash.

Description

Technical field [0001] The invention relates to a method for storing executable codes under the ARMv7m architecture, and in particular to a method for storing executable codes on an off-chip Flash without XIP under the ARMv7m architecture. Background technique [0002] In a computer system, the CPU needs to extract machine instructions first, then decode, and finally execute machine instructions. Machine instructions need to be stored in a memory directly addressable by the CPU before they can be extracted by the CPU. The memory that can be directly addressed by the CPU is generally on-chip RAM, off-chip parallel bus RAM, or parallel bus flash memory supporting XIP (execution on chip) functions. The unit storage space price of such a memory is relatively high, so an embedded MCU is generally not equipped with a large-capacity memory for storing executable codes. This limits the software functions that can be provided on the embedded MCU. If the memory of the parallel bus is ex...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/445G06F12/02
Inventor 林志伟黄健
Owner FUJIAN CENTM INFORMATION
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