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Storage method of executable code under ARMv7m architecture

A technology for executing codes and codes, applied in the field of off-chip Flash without XIP, which can solve problems affecting product performance, low chip performance, and difficulty in application, and achieve the effects of low cost, low memory consumption, and cost reduction

Active Publication Date: 2015-08-26
FUJIAN CENTM INFORMATION
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the MCU of the ARM v7m architecture is difficult to be applied to devices in complex application scenarios due to the above-mentioned limitation of the space that can directly store executable code
This makes devices with complex application scenarios have to use ARM9 / ARM11 processors with low chip performance, or high-cost processors such as ARM v7r and ARM v7a, which in turn affects the cost performance of products.

Method used

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  • Storage method of executable code under ARMv7m architecture

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Embodiment Construction

[0013] Such as figure 1 As shown, the method of the present invention is mainly participated by five logic units, namely: compilation and programming program 1, startup program 2, FPB associated program 3, execution program 4 and bus exception handling program 5. The coordination relationship of these five logical units in the overall process is as follows: figure 1 shown. The software implementations of the four logic units of the startup program 2, the FPB associated program 3, the execution program 4, and the bus exception handling program 5 are all stored in the natively supported code memory of the CPU, such as in the on-chip Flash or ROM.

[0014] In the compiling and burning program 1, through the parameter configuration of the compiler, the startup program 2, the FPB associated program 3, the execution program 4, the bus exception handling program 5 and the system and the driver are positioned on the CPU on-chip physical memory associated on the Flash address space...

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Abstract

The present invention provides a storage method of executable code under an ARMv7m architecture. The method involves five logic units including a compilation and burning program, a startup program, an FPB association program, an execution program, and a bus exception handling program. According to the method, the FPB association program associates a RAM space to an address that is not associated with a physical flash, and uses the RAM space as a storage space where the executable code is stored, and a CPU kernel uses the storage space to acquire and execute a machine instruction. In addition, the RAM space may be dynamically updated to a new value, and may be re-reset and re-associated by the FPB to a new flash address. With the method according to the present invention, a small on-chip flash is used to store FPB management code. As such, a small RAM space and a cheap off-chip flash are used to expand the storage space of the executable code to 512 MB.

Description

technical field [0001] The invention relates to a method for storing executable codes under the ARMv7m architecture, in particular to a method for storing executable codes on an off-chip XIP-free Flash under the ARMv7m architecture. Background technique [0002] In a computer system, the CPU needs to fetch machine instructions first, then decode them, and finally execute the machine instructions. Machine instructions need to be stored in memory directly addressable by the CPU before they can be fetched by the CPU. The memory directly addressable by the CPU is generally an on-chip RAM, an off-chip parallel bus RAM, or a parallel bus supporting XIP (on-chip execution) function Flash memory. The unit storage space price of such a memory is relatively high, so the embedded MCU generally does not configure a large-capacity memory that can store the execution code. This limits the software functionality available on the embedded MCU. If the space for storing and executing code ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/445G06F12/02
Inventor 林志伟黄健
Owner FUJIAN CENTM INFORMATION
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