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A paging address space management method and controller

A technology of address space and management method, which is applied in the field of paging address space management and controllers, and can solve the problems of controller 101 address resource waste, addresses that cannot be used, and cannot be successfully mounted

Active Publication Date: 2018-05-04
SHANGHAI HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The disadvantage of the prior art is that the address range of each storage unit is fixed, and once a certain storage unit allocates an external device 103, even if the external device 103 cannot use up the address resources of the storage unit, the storage The remaining addresses of the unit cannot be used, thereby causing the waste of controller 101 address resources; Successfully mount the external device 103

Method used

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  • A paging address space management method and controller
  • A paging address space management method and controller
  • A paging address space management method and controller

Examples

Experimental program
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Embodiment Construction

[0067] An embodiment of the present invention provides a paging address space management method, which is combined below image 3 As shown, a paging address space management method provided in this embodiment is described in detail:

[0068] 301. Determine address pagination;

[0069] a controller of the computer system determines an address space of the controller, the address page is formed by dividing the address space such that the sum of the address spaces of all determined address pages is equal to the address space;

[0070] This embodiment does not limit the number of the determined address pages, and does not limit the size of the address space of each address page, as long as the address space can be divided into the address pages.

[0071] 302. Determine the target peripheral address space;

[0072] The target peripheral address space is the peripheral address space that the external device requests to currently establish a mapping relationship with the address sp...

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PUM

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Abstract

Provided are a paging address space management method and controller. The paging address space management method comprises: determining an address page (301); determining a target peripheral address space (302); determining an address page satisfying a first preset requirement as a first target address page (303); and establishing a mapping between each of the first target address page and the target peripheral address space (304). The method can determine the first target address page satisfying the first preset requirement according to a size of the target peripheral address space in a peripheral device, and the established mapping is a correspondence between the address space of the first target address page and the effective target peripheral address space accessible to the peripheral device, thereby avoiding a waste of address resources resulting from mapping to a controller an address space in a peripheral device and inaccessible to the controller.

Description

technical field [0001] The invention relates to a computer system, in particular to a paging address space management method and a controller. Background technique [0002] see figure 1 As shown, the structure of the computer system provided by the prior art is described, such as figure 1 As shown, the computer system includes, but is not limited to, a processor 100, a controller 101, and a memory 102. The memory 102 is the basic unit of the computer system. The computer system needs to move data from the memory 102 or write data into the The memory 102, the external device 103 are used for the computer system to communicate with the outside or supplement the additional functions of the computer system, the controller 101 is used for connecting the processor 100 and the external device 103, and the controller 101 also provides A storage method of the memory 102 is specified, so that the controller 101 can help the processor 100 and the external device 103 to access the mem...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/0866
CPCG06F12/08
Inventor 朱爽
Owner SHANGHAI HUAWEI TECH CO LTD
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