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Method and system for reproducing operation process of network on chip

A network-on-chip and operating process technology, applied in the transmission system, digital transmission system, data exchange network, etc., can solve the problems of digital designers looking for errors and single information presentation forms, so as to improve design accuracy and shorten the design cycle. Effect

Active Publication Date: 2019-04-02
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In the existing on-chip development tools and monitoring methods, the single form of information presentation
Boring numbers actually become the biggest obstacle for designers to find errors

Method used

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  • Method and system for reproducing operation process of network on chip
  • Method and system for reproducing operation process of network on chip
  • Method and system for reproducing operation process of network on chip

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Experimental program
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Embodiment Construction

[0056] Describe technical scheme of the present invention in further detail below in conjunction with accompanying drawing: as figure 1 As shown, a method for reproducing the running process of a network-on-chip, which includes the following steps:

[0057] S1: Obtain network-on-chip configuration parameters and running log data from the network-on-chip emulator or verification platform.

[0058] Network configuration parameters are saved in XML files. By modifying the emulator, the network operation events are input into the operation log file in binary format. Among them, the event trigger time and microchip generation time are double-precision types, the microchip number is a long integer, and other fields are unsigned short integers.

[0059] S2: Draw network topology and routers according to the network-on-chip configuration parameters obtained in step S1.

[0060] Such as figure 2 As shown, the router is drawn as an octagon, corresponding to the eight directions of ...

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Abstract

The invention discloses a method and system for reproducing the operation process of a network on chip. The method includes the following steps: S1: obtaining network configuration parameters and operation log data of the network on chip from an network on chip emulator or a verification platform; S2: according to the network on chip obtained in step S1 Network configuration parameters, drawing network topology and routers; S3: According to the operation log data obtained in step S1, on the network topology drawn in step S2, reproduce the on-chip network behavior through a graphical interface; S4: use the reproduced in step S3 On-chip network behavior, observe router behavior and diagnose and analyze on-chip network, and debug on-chip network. The invention intuitively and vividly reproduces the operation process of the network on chip, and can help the research and development personnel quickly and accurately find out the defects and errors of the design and make adjustments, so as to shorten the design period and improve the design accuracy.

Description

technical field [0001] The invention relates to a method and system for monitoring and analyzing network-on-chip, in particular to a method and system for reproducing the operation process of network-on-chip. Background technique [0002] With the advancement of integration technology, the types and quantity of functional units integrated in a System-on-Chip (SoC) increase rapidly. Neither the traditional shared communication structure nor the direct communication structure can cope well with the increasing communication pressure among on-chip multi-cores. Network-on-Chip (NoC) is a new type of multi-core communication structure on a chip. Compared with the traditional communication structure, the Network-on-Chip can reflect higher bandwidth and flexibility, while achieving a balance between performance and cost. better balance. [0003] The basic data unit transmitted by the network on chip is a flit, and multiple flits can constitute a data packet. Each microchip is div...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/24H04L12/933
CPCH04L41/14H04L49/10
Inventor 王君实张晓帆黄乐天
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA