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A kind of CSP packaging chip structure and manufacturing method

A manufacturing method and chip mounting technology, which can be used in electrical components, circuits, semiconductor devices, etc., can solve the problems of loss of light-emitting area and further improvement of light-emitting efficiency.

Active Publication Date: 2018-06-08
XIAMEN CHANGELIGHT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The N electrode pad is directly formed on the P-GaN and passivation layer, although the loss of the light emitting area can be partially reduced, however, the N electrode is in contact with the N-GaN plane at the same time, and part of the light emitting area is still lost, and the luminous efficiency needs to be further improved. improve

Method used

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  • A kind of CSP packaging chip structure and manufacturing method
  • A kind of CSP packaging chip structure and manufacturing method
  • A kind of CSP packaging chip structure and manufacturing method

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Embodiment Construction

[0044] The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0045] refer to Figure 1 to Figure 2g As shown, Embodiment 1 of a CSP packaged chip structure disclosed by the present invention includes an epitaxial layer 2 , a conductive layer 3 , an insulating layer 4 , an N electrode 51 , a P electrode 52 and a substrate 6 .

[0046] Such as figure 1 As shown, the epitaxial layer 2 is composed of N-GaN 21 , active light-emitting layer 22 and P-GaN 23 which are sequentially formed. The conductive layer 3 is formed on the P-GaN 23, and the P electrode 52 is formed on the conductive layer 3; in this embodiment, the conductive layer 3 is a metal reflective layer 31, forming a flip chip. The metal reflective layer 31 is made of silver, titanium, aluminum, chromium, indium, tin, gold and alloys thereof, and is arranged in a single-layer or multi-layer structure.

[0047] A first slope 24 is formed on the ...

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Abstract

The invention discloses a CSP package chip structure. The CSP package chip structure comprises an epitaxial layer, a conductive layer, a P electrode, an N electrode and a substrate, wherein the epitaxial layer comprises an N-GaN, an active light-emitting layer and a P-GaN which are sequentially formed, the conductive layer is formed on the P-GaN, the P electrode is formed on the conductive layer, a first slop is formed on the outer side walls of the active light-emitting layer and the P-GaN, an insulation layer is formed on the first slop and partially extends to the surface of the conductive layer, a second slop is formed on the outer side wall of the N-GaN, the N electrode is formed on the second slop and isolated from the active light-emitting layer, the P-GaN and the conductive layer by means of the insulation layer, and the P electrode and the N electrode are respectively bonded with the substrate. The invention also discloses a fabrication method of the CSP package chip structure. By the CSP package chip structure, the loss of the light-emitting area can be further reduced, the light-emitting efficiency is further improved, and thus, the area of a light-emitting layer of a chip is increased under the same chip area.

Description

technical field [0001] The invention relates to the technical field of LEDs, in particular to a CSP packaged chip structure and a manufacturing method. Background technique [0002] In the prior art, GaN-based light emitting diode structures are divided into front-mount structure, vertical structure and front-mount structure. Among them, the front-mounted structure chip exposes the N-type GaN layer by dry etching, then forms a transparent conductive layer on the P-type GaN, and finally uses metals such as nickel and gold to make P / N electrodes to form a current path to emit light; vertical The structural chip forms a conductive bottom layer by using conductive sinking or substrate transfer, so that the P / N electrodes are respectively located on the upper and lower sides of the chip; the manufacturing process of the flip-chip structure chip is similar to that of the front chip, except that the transparent conductive layer is formed by the reflective metal layer. Or a transpa...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L33/24H01L33/38H01L33/48H01L33/00
CPCH01L33/005H01L33/24H01L33/385H01L33/48H01L2933/0033
Inventor 邬新根李俊贤陈亮陈凯轩张永吴奇隆刘英策周弘毅魏振东
Owner XIAMEN CHANGELIGHT CO LTD
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