Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Mini-LED chip and preparation method thereof

A mini-led and chip technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems affecting the performance of Mini-LED chips, high contact resistance of P-type contact layers, etc.

Pending Publication Date: 2022-07-29
江西耀驰科技有限公司
View PDF0 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In view of the deficiencies of the prior art, the purpose of the present invention is to provide a Mini-LED chip and its preparation method, aiming to solve the problem of high contact resistance caused by the contact between the P-type contact layer and the P-type metal electrode layer in the prior art, Technical Issues Affecting the Performance of Mini-LED Chips

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Mini-LED chip and preparation method thereof
  • Mini-LED chip and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0039] see figure 1 , shows a Mini-LED chip provided by the first embodiment of the present invention, the Mini-LED chip includes a transparent substrate 100, and a bonding layer 200, a P-type contact layer 300, a bonding layer 200, a P-type contact layer 300, Epitaxial layer 400 and specular reflection layer 500 . The transparent substrate 100 is used to support and protect the epitaxial wafer. Light is emitted from the epitaxial layer 400 to the transparent substrate 100 and scattered into the air through the transparent substrate 100 without absorbing the light source. The material of the transparent substrate 100 can be preferably selected from glass, sapphire , silicon carbide or organic transparent materials. The Mini-LED chip is a flip-chip LED chip. The transparent substrate 100 is bonded to the epitaxial wafer through the bonding layer 200 , and then the structure of the epitaxial layer 400 is turned over. Specifically, the bonding layer 200 on the epitaxial wafer a...

Embodiment 2

[0053] The second embodiment of the present invention provides a preparation method of a Mini-LED chip, the preparation method includes steps S10-S16:

[0054] Step S10, growing an epitaxial layer on the GaAs substrate;

[0055] Among them, the Mini-LED chip is a flip-chip LED chip. After growing the epitaxial layer, the P-type contact layer, the bonding layer and the transparent substrate in sequence on the GaAs substrate, the structure is turned upside down, and then the GaAs substrate is removed. , to grow other thin film layers.

[0056] Step S11, growing a P-type contact layer on the epitaxial layer, and roughening the surface of the P-type contact layer;

[0057] The P-type contact layer is a P-type gallium phosphide ohmic contact layer, and the surface of the P-type contact layer is roughened to destroy the total reflection angle and increase the light extraction angle of the epitaxial layer, thereby increasing the light extraction efficiency of the chip.

[0058] Ste...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a Mini-LED chip and a preparation method thereof, and relates to the technical field of semiconductor technologies, the Mini-LED chip comprises a transparent substrate, and the Mini-LED chip further comprises a bonding layer, a P-type contact layer, an epitaxial layer and a mirror reflection layer which are sequentially stacked on the transparent substrate; the P-type metal electrode layer and the N-type metal electrode layer are respectively arranged on the P-type contact layer and the epitaxial layer; wherein the bonding layer comprises a first bonding layer and a second bonding layer arranged on the first bonding layer, the first bonding layer is an antireflection film layer and is arranged on the transparent substrate, the second bonding layer comprises n transparent conductive layers, and n is 3-10. According to the invention, the technical problem that the performance of the Mini-LED is affected due to high contact resistance caused by contact between the P-type contact layer and the P-type metal electrode layer in the prior art can be solved.

Description

technical field [0001] The invention relates to the technical field of semiconductor technology, in particular to a Mini-LED chip and a preparation method thereof. Background technique [0002] With the continuous development of semiconductor technology and technology, consumers have higher and higher requirements for the resolution and color consistency of displays, so the requirements for traditional light-emitting diode (LED) displays are getting higher and higher, and Mini-LED, That is, micron-sized light-emitting diode devices, due to their ultra-small size, can achieve high brightness, high contrast, high color saturation and local dimming effects, and have become a promising technology in recent years, and are widely used in Monitoring and command, high-definition studio, high-end cinema, medical diagnosis, advertising display, conference and exhibition, office display, virtual reality and other commercial fields. [0003] At present, the more common Mini-LED chips a...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L33/42H01L33/22H01L33/00
CPCH01L33/42H01L33/22H01L33/0093H01L2933/0016
Inventor 郭文辉贾钊胡加辉金从龙窦志珍杨琦兰晓雯
Owner 江西耀驰科技有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products