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321results about How to "Reduce light absorption" patented technology

Manufacture method of array type high-voltage LED device

The invention discloses a manufacture method of an array type high-voltage LED device, which comprises the steps of: manufacturing a mask on a P type gallium nitride layer with an epitaxial structure, selectively etching the epitaxial structure to form an N type step structure; manufacturing a mask on the surface of an N type gallium nitride layer with an epitaxial structure, forming isolated deep trench; carrying out high-temperature sulfur phosphoric acid corrosion; depositing an insulation dielectric layer on the surface of the etched epitaxial structure; corroding the insulation dielectric layer outside the side wall of the deep trench; manufacturing a transparent conductive layer between adjacent N type step structures; partially corroding the transparent conductive layer on the surface of the P type gallium nitride layer on the N type step structure on the outermost side; and manufacturing a P metal electrode and an N metal electrode on the transparent conductive layer. According to the invention, electrode light absorption can be reduced, the light outlet area on the epitaxial side surface and the bottom of the chip is increased, the manufacture method is mutually matched with a post process, and thus the light emitting efficiency of a high-voltage LED chip can be increased.
Owner:INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI

Iii-intride semiconductor laser device, and method of fabricating the iii-nitride semiconductor laser device

In a III-nitride semiconductor laser device, a laser structure includes a support base with a semipolar primary surface comprised of a III-nitride semiconductor, and a semiconductor region provided on the semipolar primary surface of the support base. First and second dielectric multilayer films for an optical cavity of the nitride semiconductor laser device are provided on first and second end faces of the semiconductor region, respectively. The semiconductor region includes a first cladding layer of a first conductivity type gallium nitride-based semiconductor, a second cladding layer of a second conductivity type gallium nitride-based semiconductor, and an active layer provided between the first cladding layer and the second cladding layer. The first cladding layer, the second cladding layer, and the active layer are arranged in an axis normal to the semipolar primary surface. A c+ axis vector indicating a direction of the <0001> axis of the III-nitride semiconductor of the support base is inclined at an angle in the range of not less than 45 degrees and not more than 80 degrees or in the range of not less than 100 degrees and not more than 135 degrees toward a direction of any one crystal axis of the m- and a-axes of the III-nitride semiconductor with respect to a normal vector indicating a direction of the normal axis. The first and second end faces intersect with a reference plane defined by the normal axis and the one crystal axis of the hexagonal III-nitride semiconductor. The c+ axis vector makes an acute angle with a waveguide vector indicating a direction from the second end face to the first end face. A thickness of the first dielectric multilayer film is smaller than a thickness of the second dielectric multilayer film.
Owner:SUMITOMO ELECTRIC IND LTD
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