Wafer level surface acoustic filter chip packaging structure and manufacturing method thereof
A filter chip and packaging structure technology, applied in the direction of electrical components, impedance networks, etc., can solve the problems of long process, large structure size, high cost, etc., and achieve the effect of simple process
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0040] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.
[0041] Such as figure 1 As shown, a wafer-level surface acoustic filter chip packaging structure in this embodiment includes a surface acoustic filter chip wafer 1, and the surface of the surface acoustic filter chip wafer 1 includes an electrode area 1.1 and a sensing area 1.2. The surface of the electrode region 1.1 is provided with a first metal layer 2, and the area of the surface acoustic filter chip wafer 1 except the electrode region 1.1 and the sensing region 1.2 is provided with an insulating layer 3, and the first metal layer 2 and the insulating layer 3 flush, above the insulating layer 3 is provided with a bonded wafer 4 through an adhesive 5, a cavity 7 is formed between the bonded wafer 4 and the sensing area 1.2, and the bonded wafer 4 is in the electrode area 1. An opening 8 is provided at the position 1, and a metal ball 6 ...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 