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Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as bumps that are difficult to ensure the reliability of silicon substrates

Inactive Publication Date: 2016-10-05
TOSHIBA MEMORY CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In addition, there is a problem that it is difficult to ensure the reliability of the electrical connection of the silicon substrate by the bumps due to the uneven height of the bumps.

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

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Experimental program
Comparison scheme
Effect test

no. 1 Embodiment approach

[0022] figure 1 It is a schematic cross-sectional view showing the semiconductor device 1 of the first embodiment. figure 2 Yes means figure 1 A bottom view of an arrangement example of the slit 19 in the semiconductor device 1 ( figure 1 A-A cross-sectional view). Specifically, figure 2 A is a bottom view showing the first arrangement example of the slit 19, figure 2 B is a bottom view showing a second example of arrangement of the slit 19. In addition, in this manual, figure 1 The D1 direction is defined as the thickness direction of the semiconductor device 1, and figure 1 The D2 direction is defined as the width direction of the semiconductor device 1, and figure 2 The D3 direction of is defined as the depth direction of the semiconductor device 1.

[0023] Such as figure 1 As shown, the semiconductor device 1 includes a semiconductor substrate 10. The semiconductor substrate 10 is, for example, a silicon substrate. In addition, the semiconductor device 1 includes a semi...

no. 2 Embodiment approach

[0067] Next, as a second embodiment, an embodiment of a semiconductor device in which a reinforcement film is buried in a slit will be described. In the description of the second embodiment, the same reference numerals are used for the components corresponding to the first embodiment, and repeated descriptions are omitted. Image 6 It is a schematic cross-sectional view showing the semiconductor device 1 of the second embodiment. In addition, in Image 6 In the upper layer side semiconductor substrate 10A (refer to figure 1 ) Icon.

[0068] Such as Image 6 As shown, the semiconductor device 1 of the second embodiment includes a reinforcing film 117 that fills the slit 19 (in contact with the inner side wall of the slit 19) inside the slit 19. The reinforcement film 117 reinforces the semiconductor substrate 10. The reinforcement film 117 may have a hardness higher than that of the semiconductor substrate 10. The reinforcing film 117 may be a single-layer film or a multilayer f...

no. 3 Embodiment approach

[0079] Next, as a third embodiment, an embodiment of a multilayer semiconductor device using TSV will be described. In the description of the third embodiment, the same reference numerals are used for the components corresponding to the first embodiment, and repeated descriptions are omitted. Picture 9 It is a schematic cross-sectional view showing the semiconductor device 1 of the third embodiment.

[0080] Such as Picture 9 As shown, the semiconductor device 1 of the third embodiment includes a BGA (Ball Grid Array) substrate 119, and a multilayer (3) mounted (bonded, connected) on the BGA substrate 119 via bumps 122 and 123. Layer above) silicon chips 10_1 to 8 (semiconductor substrates).

[0081] The silicon chips 10_1 to 8 are stacked in layers along the thickness direction D1 of the semiconductor device 1 at intervals. In each of the silicon chips 10_1 to 8, not-shown wiring or semiconductor elements (devices) can be formed.

[0082] On the upper surface of the BGA substrat...

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PUM

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Abstract

Embodiments of the invention provide a semiconductor device capable of inhibiting buckling of a semiconductor substrate and a manufacturing method thereof. The semiconductor device according to the present embodiment includes a semiconductor substrate, an insulating film and a conductive film. The insulating film is disposed on a first surface of the semiconductor substrate. The conductive film penetrates the semiconductor substrate across from the first surface to a second surface opposite to the first surface. On the semiconductor substrate, a trench continuously or intermittently exists across from a surface side to the first surface side.

Description

[0001] [Related Application] [0002] This application enjoys the priority of Japanese Patent Application No. 2015-53874 (application date: March 17, 2015) as the basic application. This application includes all the contents of the basic application by referring to the basic application. Technical field [0003] The embodiments of the present invention relate to a semiconductor device and a manufacturing method thereof. Background technique [0004] In recent years, from the viewpoint of high functionality of semiconductors, etc., 3-dimensional or 2.5-dimensional multilayer semiconductor devices (multi-chips) using TSV (Through-Silicon Via) have attracted attention. [0005] However, in the manufacturing process of a multilayer semiconductor device using TSV, silicon substrates (chips) that are difficult to elastically deform due to bumps are electrically connected to each other. Since the silicon substrate is difficult to deform elastically, when the warpage of the silicon substrat...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/498H01L21/48
CPCH01L21/486H01L23/49827H01L23/3128H01L23/562H01L2924/181H01L2224/16145H01L2924/15311H01L2924/18161H01L23/481H01L2924/00012H01L25/0657H01L2225/06541H01L2225/06513
Inventor 久米一平东和幸
Owner TOSHIBA MEMORY CORP