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Surface Mount Electronic Assemblies

A surface mount, front surface technology used in electrical components, electrical solid devices, circuits, etc.

Active Publication Date: 2020-12-04
STMICROELECTRONICS (TOURS) SAS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this approach has disadvantages and creates implementation problems in practice, in particular

Method used

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  • Surface Mount Electronic Assemblies
  • Surface Mount Electronic Assemblies
  • Surface Mount Electronic Assemblies

Examples

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Embodiment Construction

[0018] The same reference numerals are used to designate the same elements in different drawings and, further, the various drawings are not to scale.

[0019] In the following description, when referring to terms such as "left" and "right" that describe absolute positions or terms such as "above", "below", "upper" and "lower" that describe relative positions terms such as "horizontal" or "vertical" when describing directions, refer to the Figure 1B , Figure 2B , Figure 3B , Figure 4B The orientation of the cross-sectional views, it is understood that, in practice, the described devices may be oriented differently. Unless otherwise specified, the expressions "approximately", "substantially" and "in the order of magnitude" mean within 10%, preferably within 5%, or, with respect to directional qualifiers, within 10 degrees Within, preferably within 5 degrees.

[0020] Figure 1A , Figure 1B , Figure 2A , Figure 2B , Figure 3A , Figure 3B , Figure 4A , Figu...

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Abstract

This application relates to surface mount electronic assemblies. A surface mount chip is formed from a silicon substrate having a front surface and sides. The chip includes metallization layers that will be soldered to external devices. The metallization layer has a first portion covering at least a portion of the front surface of the substrate and a second portion covering at least a portion of the sides of the substrate. A region of porous silicon is included in the substrate to separate the second portion of the metallization layer from the remainder of the substrate.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of priority from French Patent Application No. 15 / 58067, filed August 31, 2015, the content of which is hereby incorporated by reference in its entirety to the fullest extent permitted by law. technical field [0003] This disclosure relates to the field of semiconductor chips. It is more particularly aimed at surface mount chips, ie chips comprising metallization on at least one surface, which metallization is to be soldered to external components such as printed circuits or other chips. Background technique [0004] In certain applications, there is a need for surface mount chips where the metallization to be soldered to external devices continues with lateral portions on the sides of the chip. When soldering is performed, part of the soldering material joins to the lateral parts of the metallization, which makes it possible to visually check the quality of the connection. Such ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/482H01L23/488H01L21/50
CPCH01L21/50H01L23/482H01L23/488H01L2224/024H01L2224/02371H01L2224/0556H01L24/03H01L24/05H01L2224/03462H01L2224/0401H01L2224/04026H01L2224/05147H01L2224/05548H01L2224/05558H01L2224/05571H01L2224/05582H01L2224/05611H01L2224/94H01L2224/02311H01L21/306H01L21/78H01L2924/00012H01L2224/03H01L2924/00014H01L21/0203H01L21/302H01L21/3043H01L21/30604H01L21/76843H01L21/76879H01L23/528H01L29/0657H01L29/16H01L21/3065H01L21/76867H01L23/5386
Inventor O·奥里
Owner STMICROELECTRONICS (TOURS) SAS