Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

FPGA-based digital video display interface module and communication method thereof

A technology of display interface and digital video, which is applied in the field of digital video display interface module and its communication, can solve the problems of image smear phenomenon and insufficient cache rate, and achieve the effect of increasing cache rate, improving display performance and eliminating smear phenomenon

Active Publication Date: 2017-05-24
ZHONGBEI UNIV
View PDF8 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The present invention provides an FPGA-based digital video display interface module and its communication method in order to solve the problem of smear phenomenon in the image displayed by the device due to insufficient cache rate of the existing display interface.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • FPGA-based digital video display interface module and communication method thereof
  • FPGA-based digital video display interface module and communication method thereof
  • FPGA-based digital video display interface module and communication method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0018] A digital video display interface module based on FPGA, including FPGA, DDR3-SDRAM, CH7301C chip and DVI-I interface; wherein, FPGA is connected with DDR3-SDRAM and CH7301C chip respectively; CH7301C chip is connected with DVI-I interface; DVI- The I interface is connected with the display device.

[0019] Described FPGA comprises clock driver, image data receiving module, address generator, register configuration unit, ODDR2+OBUFDS, display control unit; Wherein, clock driver is respectively connected with image data receiving module, address generator, register configuration unit, ODDR2+OBUFDS , display control unit connection; image data receiving module and address generator are connected with DDR3-SDRAM; address generator is connected with display control unit; register configuration unit, ODDR2+OBUFDS, display control unit are connected with CH7301C chip; display control unit Connect with DDR3-SDRAM.

[0020] Described CH7301C chip comprises clock driver, data re...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to display interfaces, in particular to an FPGA-based digital video display interface module and a communication method thereof, through which the problem of the conventional display interface that an insufficient cache rate causes smearing of an image displayed on equipment is solved. The FPGA-based digital video display interface module comprises an FPGA, a DDR3-SDRAM, a CH7301C chip, and a DVI-I interface, wherein the FPGA is connected with both the DDR3-SDRAM and the CH7301C chip, the CH7301C chip is connected with the DVI-I interface, and the DVI-I interface is connected with a display. The FPGA-based digital video display interface module and the communication method thereof provided by the invention are applicable to aerospace, military, medicine and other fields.

Description

technical field [0001] The invention relates to a display interface, in particular to an FPGA-based digital video display interface module and a communication method thereof. Background technique [0002] The display interface refers to the interface connecting the graphics card with the image output device (such as monitor, TV, etc.). Various existing display interfaces (such as VGA interface) generally have the problem of insufficient buffer rate due to their own structure and principle limitations, which leads to smear phenomenon in the image displayed by the device, resulting in poor display performance of the device. Therefore, it is necessary to invent a brand-new display interface to solve the problem of smear phenomenon in the image displayed by the device due to insufficient cache rate of the existing display interface. Contents of the invention [0003] The present invention provides an FPGA-based digital video display interface module and a communication method...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H04N5/765G09G3/20
CPCH04N5/765G09G3/2096Y02D10/00
Inventor 王红亮陈一波王柳明王朝杰胡晓峰曹京胜卢振国吕云飞
Owner ZHONGBEI UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com