Adaptive scheme for incremental step pulse programming of flash memory

A flash memory, memory cell technology, applied in static memory, read-only memory, digital memory information, etc., can solve the problems of long overall programming performance, low programming efficiency, slow programming, etc.

Active Publication Date: 2017-08-08
SK HYNIX INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, lower V start value results in slower than necessary programming during the BOL to MOL cycle, thus resulting in excessively long overall programmi...

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  • Adaptive scheme for incremental step pulse programming of flash memory
  • Adaptive scheme for incremental step pulse programming of flash memory
  • Adaptive scheme for incremental step pulse programming of flash memory

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Embodiment Construction

[0029] In this disclosure, an adaptive programming method for programming flash memory is described that significantly reduces the total programming time with minimal overhead. Figure 4 is a flowchart 400 illustrating an adaptive programming technique according to some embodiments. At step 402, flash memory programming is initiated. First, the cell programming speed is detected using a test programming voltage (step 404). Then, the start programming voltage V is adjusted based on the detected cell programming speed start (step 406). Then, using V start ISPP is performed with the adjusted value of . This technique makes V start Changes at different stages of the life of the flash memory to cause changes in the programming characteristics of the memory cells. For example, adaptive techniques result in higher V startvalue, which will help reduce the number of program / verify iterations to program the memory cells to the desired state. A more detailed implementation of the ...

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Abstract

According to an adaptive programming method for flash memories, the cell programming speed is detected by programming a number of cells using a fixed trial program voltage. A starting program voltage Vstart is then adjusted based on the detected cell programming speed. The ISPP is then carried out using the adjusted value for Vstart.

Description

[0001] Cross References to Related Applications [0002] This application claims application number 62 / 248,940, filed October 30, 2015, entitled "ADAPTIVE SCHEME FOR INCREMENTAL STEP PULSE PROGRAMMING OF NAND MEMORY" The benefit of the US Provisional Application, which is incorporated herein by reference. Background technique [0003] With continued flash memory scaling, especially NAND flash memory technology scaling, it is routine to use a fixed starting programming voltage (V start ) lead to inefficient programming. Incremental Step Pulse Programming (ISPP) is a way to achieve V th The balance between distribution and programming time (tPROG) of common NAND programming methods. Figure 1 shows the ISPP scheme, and Figure 2 shows four threshold voltage distributions for 2-bit-per-cell flash memory, where L 0 Indicates the erased state, L 1 , L 2 and L 3 Indicates 3 programming states. ISPP starts programming by applying a relatively low V start This is followed by a ...

Claims

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Application Information

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IPC IPC(8): G11C16/34
CPCG11C16/3495G11C11/5628G11C16/3459G11C29/021G11C29/028
Inventor 李濬张延
Owner SK HYNIX INC
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