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Hybrid Memory Device And Operating Method Thereof

A storage device, hybrid storage technology, used in memory systems, instruments, memory architecture access/allocation, etc.

Inactive Publication Date: 2017-09-26
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Also, PCRAM uses a lot of energy during write operations and has limited write endurance

Method used

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  • Hybrid Memory Device And Operating Method Thereof
  • Hybrid Memory Device And Operating Method Thereof
  • Hybrid Memory Device And Operating Method Thereof

Examples

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Embodiment Construction

[0025] Various embodiments will be described in more detail below with reference to the accompanying drawings. However, this invention may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Throughout the present invention, in the various drawings and embodiments of the present invention, the same drawings refer to the same parts. It should also be noted that in this specification, "connected / coupled" not only means that one element is directly coupled to another element, but also means that one element is indirectly coupled to another element through an intermediate component. It should be understood that although the terms "first," "second," "third," etc. may be used herein to describe various elements, these elements should not be limited by these t...

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Abstract

A memory device may include: a data determination unit for receiving page data from a main memory device, and distinguishing between first and second data based on tag information of the page data; an index management unit for storing an index of the first data; a first cache for storing the second data, and writing back first victim data to the main memory device, the first victim data being selected when the first cache is full; and a second cache for storing the first victim data transferred from the first cache when a write count of the first victim data is smaller than a first threshold value, updating tag information of second victim data to a value indicating the first data, the second victim data being selected when the second cache is full, and storing the second victim data in the main memory device.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from Korean Patent Application No. 10-2016-0032301 filed with the Korean Intellectual Property Office on March 17, 2016, the entire contents of which are hereby incorporated by reference in their entirety. technical field [0003] Various embodiments of the present application generally relate to a semiconductor design technology, and more specifically, relate to a hybrid storage device capable of managing cold data and hot data. Background technique [0004] Semiconductor memory devices are generally classified into volatile memory devices and nonvolatile memory devices. [0005] Volatile memory devices have high write and read speeds, but lose data stored therein when power to the device is cut off. Examples of volatile memory devices include dynamic random access memory (DRAM), static RAM (SRAM), and the like. Nonvolatile memory devices have relatively lower write and read speeds t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06
CPCG06F3/0604G06F3/0658G06F3/068G06F12/0871G06F12/123G06F2212/1021G06F2212/1024G06F2212/202G06F2212/205G06F2212/283G06F2212/7207G06F12/0804G06F12/0868G06F12/0882G06F12/0811G06F12/0815G06F2212/608
Inventor 权正贤许京哲金头铉
Owner SK HYNIX INC