A step driver system and its method for controlling pwm timing and dead zone

Abstract

The invention discloses a stepping driver system and a method for controlling a PWM time sequence and a dead zone. Firstly, a microprocessor gives out a PWM control signal after an external instruction is received; the PWM control signal passes through an FPGA module firstly, and the FPGA module generates two paths of PWM signals which are complementary up and down and with a dead zone, and next,a power tube is driven by a power driving chip to complete PWM modulation; the FPGA module generates two paths of PWM signals which are complementary up and down and with the dead zone for driving anupper bridge power tube and a lower bridge power tube of the power tube; the FPGA module realizes PWM dead zone control; the dead zone time td is set to be 0.5-1us according to the driver power value;and the shutdown time sequence of the PWM is controlled according to an enabling signal EN and an overcurrent signal I<in> from a processor. The FPGA module is adopted for programming, and then the dead zone of the stepping driver power tube is controlled; the proper dead zone time is selected according to the stepping driver power value, and a dead zone programming method is proposed; and in addition, a control time sequence for closing the power tube PWM is added, so that the power tube can be protected effectively.

Description

Technical field: [0001] The invention relates to the technical field of stepping driver products, in particular to a stepping driver system and a method for controlling PWM timing and dead zone. Background technique: [0002] With the continuous promotion of applications, more and more stepper drivers use full-bridge drive circuits, which can work in four quadrants and adopt PWM (pulse width modulation technology) modulation, while the upper and lower power tubes of the full-bridge drive circuit must prevent At the same time, it needs to control the PWM signals of the upper and lower bridges (usually recorded as PWMH and PWML) to be in an invalid state for a certain period of time (called dead time) when switching. [0003] At present, the dead zone of the full bridge driver is mostly generated by microprocessor programming or controlled by the integrated dead zone time of chips such as IR2103, IR21404, IR2109 and FAN73832. Since the two-way PWM complementary signals from t...

AI Technical Summary

Problems solved by technology

Since the two-way PWM complementary signals generated by the microprocessor in the dead zone cannot be programmed when the shutdown sequence is encountered, the power drive chip with integrated dead zone is prone to failure when the power supply of this integrated dead zone is disturbed.

Therefore, the reliability of the dead zone generated by microprocessor software programming is good, but the shutdown sequence control cannot be performed; the existing power driver chips IR2104, IR2109, etc. have a built-in dead zone of about 0.5us, and the required dead zone time cannot be programmed according to the needs. , and when the temperature of the driver rises or the circuit signal is disturbed, the dead zone is easily disturbed and fails, reducing the reliability of the stepper driver

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