A centralized 1588 implementation system and method

Abstract

A centralized 1588 implementation system and method, relating to the field of 1588 time synchronization. The system comprises a master clock device and a slave clock device, each device comprising a master control panel and a line panel, the master control panel and the line panel each comprising a time synchronization module, the master control panel further comprising a local time module. The time synchronization module of the master control panel completes the sending and receiving of a 1588 message, and calculates the difference according to the collected data and completes time synchronization adjustment of the device; The local time module of the master control panel is configured to output a 1PPS+TOD signal to the time synchronization module of the line panel for synchronization, and is further configured to complete the normal forwarding and time stamping of the 1588 message and correct forwarding delay of the message within the device. The time synchronization module of the line panel completes the normal forwarding and time stamping of the 1588 message and corrects forwarding delay of the message within the device. The present invention ensures the convergence of time synchronization between devices implemented in a centralized manner in the case of interaction of messages at any rate.

Description

technical field [0001] The present invention relates to the field of 1588 time synchronization, in particular to a centralized 1588 implementation system and method. Background technique [0002] At present, the implementation methods of the 1588 time synchronization device are mainly divided into distributed implementation and centralized implementation. Among them, the centralized implementation method has obvious advantages and has gradually become the mainstream approach. Referring to the IEEE1588-2008 standard, the 1588 time synchronization technology obtains four timestamps t1, t2, t3, t4, and synchronization by exchanging synchronization messages, delay request messages and delay response messages between the master and slave devices. Message correction field CF1, delay request message correction field CF2, and then according to the formula: [0003] Time offset = ((t2-t1-CF1)-(t4-t3-CF2)) / 2 [0004] Obtain the time deviation value and adjust to achieve time synchr...

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Problems solved by technology

[0033] ②Before the slave clock completes the next message interaction, the time synchronization module of the slave clock circuit board fails to synchronize the time synchronization module of the slave clock master control board in time, assuming that 4 message exchanges are completed in 1 second, and the previous deviation is repeated many times Calculate, it will be found that the time deviation of the master-slave clock device is as follows Figure 5 As shown, it cannot converge to 0 stably, and cannot meet the requirements of time synchronization

[0034] To sum up, for traditional centralized implementation devices, the speed of message interaction must not exceed 1 time per second, otherwise the synchronization cannot converge

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